LTC2489CDEPBF datasheet(5/24 Pages) LINER

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LTC2489

2489f

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

fEOSC

External Oscillator Frequency Range

(Note 16)

●

4000

kHz

tHEO

External Oscillator High Period

●

0.125

μs

tLEO

External Oscillator Low Period

●

0.125

μs

tCONV

Conversion Time

Internal Oscillator

External Oscillator (Note 10)

●

144.1

146.9

41036/fEOSC (in kHz)

149.9

DIGITAL INPUTS AND DIGITAL OUTPUTS The ● denotes the speciﬁcations which apply over the

full operating temperature range, otherwise speciﬁcations are at TA = 25°C. (Note 3)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

fSCL

SCL Clock Frequency

●

400

kHz

tHD(STA)

Hold Time (Repeated) Start Condition

●

0.6

μs

tLOW

Low Period of the SCL Pin

●

1.3

μs

tHIGH

High Period of the SCL Pin

●

0.6

μs

tSU(STA)

Set-Up Time for a Repeated Start Condition

●

0.6

μs

tHD(DAT)

Data Hold Time

●

00.9

μs

tSU(DAT)

Data Set-Up Time

●

100

Rise Time for SDA Signals

(Note 14)

●

20 + 0.1CB

300

Fall Time for SDA Signals

(Note 14)

●

20 + 0.1CB

300

tSU(STO)

Set-Up Time for Stop Condition

●

0.6

μs

I2C TIMING CHARACTERISTICS The ● denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at TA = 25°C. (Note 3, 15)

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All voltage values are with respect to GND.

Note 3: VCC = 2.7V to 5.5V unless otherwise speciﬁed.

VREFCM = VREF/2, FS = 0.5VREF

VIN = IN+ – IN–, VIN(CM) = (IN+ – IN–)/2,

where IN+ and IN– are the selected input channels.

Note 4: Use internal conversion clock or external conversion clock source

with fEOSC = 307.2kHz unless otherwise speciﬁed.

Note 5: Guaranteed by design, not subject to test.

Note 6: Integral nonlinearity is deﬁned as the deviation of a code from a

straight line passing through the actual endpoints of the transfer curve.

The deviation is measured from the center of the quantization band.

Note 7: fEOSC = 256kHz ±2% (external oscillator).

Note 8: fEOSC = 307.2kHz ±2% (external oscillator).

Note 9: Simultaneous 50Hz/60Hz (internal oscillator) or fEOSC = 280kHz

±2% (external oscillator).

Note 10: The external oscillator is connected to the FO pin. The external

oscillator frequency, fEOSC, is expressed in kHz.

Note 11: The converter uses its internal oscillator.

Note 12: The output noise includes the contribution of the internal

calibration operations.

Note 13: Guaranteed by design and test correlation.

Note 14: CB = capacitance of one bus line in pF (10pF ≤ CB ≤ 400pF).

Note 15: All values refer to VIH(MIN) and VIL(MAX) levels.

Note 16: Refer to Applications Information section for performance versus

data rate graphs.

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