LTC2489CDEPBF datasheet(4/24 Pages) LINER

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LTC2489

2489f

I2C INPUTS AND DIGITAL OUTPUTS The ● denotes the speciﬁcations which apply over the full

operating temperature range, otherwise speciﬁcations are at TA = 25°C. (Note 3)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

VIH

High Level Input Voltage

●

0.7VCC

VIL

Low Level Input Voltage

●

0.3VCC

VIHA

High Level Input Voltage for Address Pins CA0, CA1

●

0.95VCC

VILA

Low Level Input Voltage for Address Pins CA0, CA1

●

0.05VCC

RINH

Resistance from CA0, CA1 to VCC to Set Chip Address

Bit to 1

●

kΩ

RINL

Resistance from CA0, CA1 to GND to Set Chip Address

Bit to 0

●

kΩ

RINF

Resistance from CA0, CA1 to GND or VCC to Set Chip

Address Bit to Float

●

MΩ

Digital Input Current

●

–10

μA

VHYS

Hysteresis of Schmidt Trigger Inputs

(Note 5)

●

0.05VCC

VOL

Low Level Output Voltage (SDA)

I = 3mA

●

0.4

tOF

Output Fall Time VIH(MIN) to VIL(MAX)

Bus Load CB 10pF to

400pF (Note 14)

●

20 + 0.1CB

250

IIN

Input Leakage

0.1VCC ≤ VIN ≤ VCC

●

1μA

CCAX

External Capacitative Load on Chip Address Pins (CA0, CA1)

for Valid Float

●

POWER REQUIREMENTS The ● denotes the speciﬁcations which apply over the full operating temperature

range, otherwise speciﬁcations are at TA = 25°C. (Note 3)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

VCC

Supply Voltage

●

2.7

5.5

ICC

Supply Current

Conversion Current (Note 11)

Sleep Mode (Note 11)

●

160

275

μA

ANALOG INPUT AND REFERENCE The ● denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at TA = 25°C. (Note 3)

IDC_LEAK(IN–)

IN– DC Leakage Current

Sleep Mode, IN– = GND

●

–10

IDC_LEAK(REF+) REF+ DC Leakage Current

Sleep Mode, REF+ = VCC

●

–100

100

IDC_LEAK(REF–) REF– DC Leakage Current

Sleep Mode, REF– = GND

●

–100

100

tOPEN

MUX Break-Before-Make

QIRR

MUX Off Isolation

VIN = 2VP-P DC to 1.8MHz

120

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