Philips Semiconductors

Product specification

SC26C94

Quad universal asynchronous receiver/transmitter (QUART)

1995 May 1

23

SYMBOL

FIGURE

PARAMETER

LIMITS

UNIT

SYMBOL

FIGURE

PARAMETER

Min

Typ

Max

UNIT

Reset timing

7

Reset pulse width

200

ns

I/O Port timing

8

I/O input setup time before RDN Low

0

ns

8

I/O input hold time after RDN High

0

ns

8

I/O output valid from

WRN High

RDN Low

110

110

ns

ns

Interrupt timing

9

IRQN negated or I/O output High from:

Read RHR (RxRDY/FFULL interrupt)

Write THR (TxRDY interrupt)

Reset command (break change interrupt)

Reset command (I/O change interrupt)

Stop C/T command (counter interrupt)

Write IMR (clear of interrupt mask bit)

With respect to a

3.6864MHz clock

on pin X1/CLK

100

100

100

100

100

100

ns

ns

ns

ns

ns

ns

Clock timing

10

X1/CLK low/high time

125/100

ns

10

X1/CLK low/high time (above 4MHz; X1/CLK

÷ 2 active)

56/56

ns

10

X1/CLK frequency

3.6864

8.0

MHz

10

Counter/timer clock high or low time

60

ns

10

Counter/timer clock frequency

8

MHz

10

RxC high or low time

30

ns

10

RxC frequency (16X)

RxC frequency (1X)

16

1.0

MHz

MHz

10

TxC high or low time

30

ns

10

TxC frequency (16X)

TxC frequency (1X)

16

1.0

MHz

MHz

Transmitter timing

11

TxD output delay from TxC low

120

ns

11

TxC output delay from TxD output data

–20

+20

ns

Receiver timing

12

RxD data setup time to RxC high

100

ns

12

RxD data hold time from RxC high

100

ns

NOTES:

1. Stress above these listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only.

Functional operation of the device at these or any other condition above those indicated in the operation section of the specification is not

implied.

3. This product includes circuitry specifically designed for the protection of its internal devices from damaging effects of excessive static

charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying any voltages larger than the rated maxima.

4. Parameters are valid over specified temperature range. See ordering information table for applicable temperature range and operating

supply range.

5. All voltage measurements are referenced to ground (GND). For testing, all inputs swing between 0.4V and 2.4V with a transition time of 20ns

appropriate.

8. Timing is illustrated and referenced to the WRN and RDN inputs. The device may also be operated with CEN as the ‘strobing’ input. CEN

and RDN (also CEN and WRN) are ANDed internally. As a consequence, the signal asserted last initiates the cycle and the signal negated

first terminates the cycle.