CD74AC238 3-Line to 8-Line Decoder/Demultiplexer

1 Features

• AC types feature 1.5V to 5.5V operation and

balanced noise immunity at 30% of the supply

voltage

• Speed of bipolar F, AS, and S, with significantly

reduced power consumption

• Designed specifically for high-speed memory

decoders and data-transmission systems

• Incorporates three enable inputs to simplify

cascading and/or data reception

• Balanced propagation delays

• ±24mA output drive current

– Fanout to 15 F devices

• SCR-latchup-resistant CMOS process and circuit

design

• Exceeds 2kV ESD protection per MIL-STD-883,

method 3015

2 Description

The CD74AC238 decoder/demultiplexer is designed

for high-performance memory-decoding and data-

routing

applications

that

require

very

short

propagation-delay

times.

In

high-performance

memory systems, this decoder can be used to

minimize the effects of system decoding.

Package Information

PART NUMBER

PACKAGE(1)

PACKAGE SIZE(2)

BODY SIZE(3)

CD74AC238

BQB (WQFN, 16)

3.5mm × 2.5mm

3.5mm × 2.5mm

D (SOIC, 16)

9.9mm × 6mm

9.9mm × 3.9mm

PW (TSSOP, 16)

5.00mm × 6.4mm

5.00mm × 4.40mm

(1)

For more information, see Section 10.

(2)

The package size (length × width) is a nominal value and

includes pins, where applicable.

(3)

The body size (length × width) is a nominal value and does

not include pins.

CD74AC238

SCHS331B – FEBRUARY 2003 – REVISED JULY 2024

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.