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SAB9079HS датащи(PDF) 13 Page - NXP Semiconductors |
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SAB9079HS датащи(HTML) 13 Page - NXP Semiconductors |
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13 / 48 page ![]() 2000 Jan 13 13 Philips Semiconductors Preliminary specification Multistandard Picture-In-Picture (PIP) controller SAB9079HS Acquisition window The acquisition window is 720 pixels. This is related to a whole line of 896 pixels. So for PAL will be acquired from the active video. For NTSC this will be slightly less . The vertical acquisition window is 228 lines for NTSC and 276 lines for PAL. Data will be acquired in a 4 :2:2 format. The acquisition clock is 896 × HSYNC. Acquisition fine positioning All I2C-bus settings relate to the incoming HSYNC, whether this is a real HSYNC or a burstkey for horizontal positioning. The same applys for the incoming VSYNC for vertical positioning. The relationships between the acquisition window and the internal clamp pulse are illustrated in Fig.6. In an application the clamp pulse must be positioned, by the I2C-bus, between the HSYNC and the start of the active video of the incoming signal. Display window The display window available for PIP pictures is also 720 pixels wide, related to a 896 pixels line. The vertical display window is 228 lines for NTSC and 276 lines for PAL. Background window The origin of the display window is referenced to the origin of the background window. The background area is 768 pixels wide. Vertically it is 238 lines for NTSC and 286 lines for PAL. Display fine positioning The I2C-bus defined fine positioning has relationships to the internal HSYNC and VSYNC as illustrated in Fig.7. 720 896 ---------- 64 µs × 720 896 ---------- 63.5 µs × Fig.6 Acquisition fine positioning. handbook, full pagewidth MGS391 MAHFP MAVFP CIDEL CIPER 228/276 lines 720 pixels The grey area depicts the background. |
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