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MGS386

SAB9079HS

CONTROL

CLAMP AND ADC

VDRAM CONTROL

AND

(RE-)FORMATTING

SY

105

SU

103

SV

101

PLL AND CLOCK

GENERATOR

Vbias(SA)

104

Vref(T)(SA)

107

Vref(B)(SA)

106

CLAMP AND ADC

MY

126

MU

128

MV

2

PLL AND CLOCK

GENERATOR

PLL AND CLOCK

GENERATOR

HORIZONTAL

AND

VERTICAL

FILTER

LINE MEMORY

HORIZONTAL

AND

VERTICAL

FILTER

DAC

AND

BUFFER

DISPLAY

CONTROL

LINE MEMORY

LINE MEMORY

TEST

CONTROL

MHSYNC

9

DVSYNC

MVSYNC

21

n.c.

84

DFB

19

Vref(T)(DA)

25

Vref(B)(DA)

26

Vbias(DA)

28

DV

29

DU

27

DY

24

DHSYNC

20

8

SHSYNC

94

SVSYNC

95

Vbias(MA)

127

Vref(T)(MA)

124

125

Vref(B)(MA)

111

114

TCBR

A0

110

115

TCBD

SDA

97

112

116

TCBC

SCL

117

TSMSB

POR

121

TM0

120

TM2

119

TM1

118

TC

7

TMCLK

15, 18, 22,

85, 88,

109, 122

VDDD(C1)

to

VDDD(C7)

16, 17, 23,

86, 87,

108, 123

VSSD(C1)

to

VSSD(C7)

13,

47, 63,

75, 90

VSSD(P1)

to

VSSD(P5)

14,

48, 62,

76, 89

VDDD(P1)

to

VDDD(P5)

98

TSEXT

78

70

77

40

51

SC

79 to 83,

74 to 71

AD8

to AD0

41 to 46,

49, 50, 69,

67, 65, 61,

59, 57, 55, 53

DAO0

to DAO15

39 to 32,

68, 66, 64,

60, 58, 56,

54, 52

DAI0

to DAI15

30

VSSA(DA)

31

VDDA(DA)

113

VDDD(P)

1

VDDA(MF)

3

VSSA(MA)

4

VDDA(MA)

10

VDDA(MP)

11

VSSA(MP)

12

VDDA(MH)

99

VDDA(SA)

100

VSSA(SA)

102

VDDA(SF)

91

VDDA(SH)

92

VSSA(SP)

93

VDDA(SP)

6

TMMSB

5

TMEXT

96

TSCLK

CAS

WE

RAS

DT

Fig.1 Block diagram.