LMV1024 datasheet(3/17 Pages) NSC

3 / 17 page

2.7V Electrical Characteristics (Note 3)

Unless otherwise specified, all limits are guaranteed for T

J = 25˚C, VDD = 2.7V, VIN =18mVPP,fCLK = 1.2 MHz, Duty Cycle =

50% and 100 nF capacitor between V

REF and GND. Boldface limits apply at the temperature extremes.

Symbol

Parameter

Conditions

Min

(Note 4)

Typ

(Note 5)

Max

(Note 4)

Units

SNR

Signal to Noise Ratio

IN = 1 kHz, A-Weighted

Digital Noise Floor (Integrated)

f = 20 Hz to 10 kHz, A-Weighted, 4.7

pF Capacitor Connected from Input

to GND to Simulate ECM, No Signal

−89

dBFS(A)

THD

Total Harmonic Distortion

IN = 1 kHz, VIN =18mVPP

0.03

Supply Current

IN = GND, CLK = ON, High

Impedance Load (Note 7)

535

µA

IN = GND, CLK = OFF

519

650

LOW

CLOCK Logic Low Level

0.3

HIGH

CLOCK Logic High Level

2.4

DATA Output Logic Low Level

0.1

DATA Output Logic High Level

2.6

Max Input Signal

IN = 1 kHz, THD < 1%

249

OUT

Max Output Signal

IN = 1 kHz, THD < 1%

−6.6

dBFS

PSRR

Power Supply Rejection Ratio

IN = GND, Test Signal on VDD =

217 Hz, 100 mV

100

Time from CLOCK Transition to

DATA Becoming High

Impedance (See also Figure 10,

Application Section)

LMV1024: On Rising Edge of the

CLOCK

LMV1026: On Falling Edge of the

CLOCK

Time from CLOCK Transition to

DATA Becoming Valid (See also

Figure 10, Application Section)

LMV1024: On Falling Edge of the

CLOCK

LMV1026: On Rising Edge of the

CLOCK

Input Capacitance

2pF

Input Impedance

1000

Ω

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.

Note 2: The Human Body Model (HBM) is 1.5 k

Ω in series with 100 pF. The Machine Model is 0Ω in series with 200 pF.

Note 3: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of

the device such that TJ =TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA.

Note 4: All limits are guaranteed by design or statistical analysis.

Note 5: Typical values represent the most likely parametric norm.

Note 6: The maximum power dissipation is a function of TJ(MAX) , θJA and TA. The maximum allowable power dissipation at any ambient temperature is

PD =(TJ(MAX) -TA)/θJA. All numbers apply for packages soldered directly into a PC board.

Note 7: The Supply Current depends on the applied Clock Frequency and the load on the DATA output.

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