MMA3201DR2 datasheet(3/10 Pages) FREESCALE

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Sensors

Freescale Semiconductor

MMA3201D

Table 2. Operating Characteristics

(Unless otherwise noted: –40°C

≤ TA ≤ +105°C, 4.75 ≤ VDD ≤ 5.25, X and Y Channels, Acceleration = 0g, Loaded output.(1))

Characteristic

Symbol

Min

Typ

Max

Unit

Operating Range(2)

Supply Voltage(3)

Supply Current

Operating Temperature Range

Acceleration Range

VDD

IDD

gFS

4.75

–40

—

5.00

—

5.25

+125

—

°C

Output Signal

Zero g (TA = 25°C, VDD = 5.0 V)(4)

Zero g

Sensitivity (TA = 25°C, VDD = 5.0 V)(5)

Sensitivity

Bandwidth Response

Nonlinearity

VOFF

VOFF,V

f–3dB

NLOUT

2.35

0.46 VDD

9.3

360

–1.0

2.5

0.50 VDD

400

—

2.65

0.54 VDD

10.7

440

+1.0

mV/g

mV/g/V

% FSO

Noise

RMS (.01 Hz – 1 kHz)

Power Spectral Density

Clock Noise (without RC load on output)(6)

nRMS

nPSD

nCLK

—

110

2.0

2.8

—

mVrms

µV/(Hz1/2)

mVpk

Self-Test

Output Response

Input Low

Input High

Input Loading(7)

Response Time(8)

gST

VIL

VIH

IIN

tST

9.6

VSS

0.7

× VDD

–30

—

–110

2.0

14.4

0.3

× VDD

VDD

–300

–

µA

Status(9), (10)

Output Low (Iload = 100 µA)

Output High (Iload = 100 µA)

VOL

VOH

—

VDD –.8

—

0.4

—

Minimum Supply Voltage (LVD Trip)

VLVD

2.7

3.25

4.0

Clock Monitor Fail Detection Frequency

fmin

—

260

kHz

Output Stage Performance

Electrical Saturation Recovery Time(11)

Full Scale Output Range (IOUT = 200 µA)

Capacitive Load Drive(12)

Output Impedance

tDELAY

VFSO

—

0.25

—

0.2

—

300

—

VDD–0.25

100

—

Mechanical Characteristics

Transverse Sensitivity(13)

Package Resonance

VXZ,YZ

fPKG

—

5.0

—

% FSO

kHz

1. For a loaded output the measurements are observed after an RC filter consisting of a 1 k

Ω resistor and a 0.01 µF capacitor to ground.

2. These limits define the range of operation for which the part will meet specification.

3. Within the supply range of 4.75 and 5.25 volts, the device operates as a fully calibrated linear accelerometer. Beyond these supply limits the

device may operate as a linear device but is not guaranteed to be in calibration.

4. The device can measure both + and – acceleration. With no input acceleration the output is at midsupply. For positive acceleration the output

will increase above VDD/2 and for negative acceleration the output will decrease below VDD/2.

5. The device is calibrated at 20g.

6. At clock frequency

≅70 kHz.

7. The digital input pin has an internal pull-down current source to prevent inadvertent self test initiation due to external board level leakages.

8. Time for the output to reach 90% of its final value after a self-test is initiated.

9. The Status pin output is not valid following power-up until at least one rising edge has been applied to the self-test pin. The Status pin is high

whenever the self-test input is high, as a means to check the connectivity of the self-test and Status pins in the application.

10. The Status pin output latches high if a Low Voltage Detection or Clock Frequency failure occurs, or the EPROM parity changes to odd. The

Status pin can be reset low if the self-test pin is pulsed with a high input for at least 100

µs, unless a fault condition continues to exist.

11. Time for amplifiers to recover after an acceleration signal causing them to saturate.

12. Preserves phase margin (60°) to guarantee output amplifier stability.

13. A measure of the device's ability to reject an acceleration applied 90° from the true axis of sensitivity.

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