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MBM29PL65LM90TN датащи(PDF) 2 Page - SPANSION |
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MBM29PL65LM90TN датащи(HTML) 2 Page - SPANSION |
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2 / 56 page ![]() MBM29PL65LM-90/10 2 s s s s FEATURES • MirrorFlash MemoryTM*1 • 0.23 µµµµm Process Technology • 4 M × 16 bit configuration • Single 3.0 V read, program and erase • Standard 48-pin TSOP (1) (Package suffix : TN) • Minimum 100,000 program/erase cycles • High performance Page mode (4 words) • Sector erase architecture (Sectors can be grouped in any given combination.) 32K word sectors Any combination of sectors can be concurrently erased. Also supports full chip erase. • HiddenROM Region • Write Protect by WP pin • Embedded EraseTM*2 Algorithms • Embedded ProgramTM*2 Algorithms •Data Polling and Toggle Bit feature for detection of program or erase cycle completion • Automatic sleep mode • Erase Suspend/Resume •Low VCC write inhibit • Sector Group Protection • Extended Sector Group Protection • Fast Program • Temporary sector group unprotection • In accordance with CFI (Common Flash Memory Interface) *1 : MirrorFlashTM is a trademark of Fujitsu Limited. *2 : Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc. |
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