DSP56362P datasheet(5/152 Pages) FREESCALE

5 / 152 page

Overview

DSP56362 Technical Data, Rev. 4

Freescale Semiconductor

1-5

— Triple timer module with single external interface or GPIO line

— On-chip peripheral registers are memory mapped in data memory space

•

Reduced Power Dissipation

— Very low-power (3.3 V) CMOS design

— Wait and stop low-power standby modes

— Fully-static logic, operation frequency down to 0 Hz (dc)

— Optimized power management circuitry (instruction-dependent, peripheral-dependent, and

mode-dependent)

1.2

Package

•

144-pin plastic thin quad flat pack (LQFP) surface-mount package

1.3

Documentation

Table 1-1

lists the documents that provide a complete description of the DSP56362 and are required to

design properly with the part. Documentation is available from a local Freescale distributor, a Freescale

semiconductor sales office, a Freescale Literature Distribution Center, or through the Freescale DSP home

page on the Internet (the source for the latest information).

Table 1-1 DSP56362 Documentation

Document Name

Description

Order Number

DSP56300 Family Manual

Detailed description of the 56000-family architecture

and the 24-bit core processor and instruction set

DSP56300FM

DSP56362 User’s Manual

Detailed description of memory, peripherals, and

interfaces

DSP56362UM

DSP56362 Product Brief

Brief description of the chip

DSP56362P

DSP56362 Data Sheet

(this document)

Electrical and timing specifications; pin and package

descriptions

DSP56362

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