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TMS320VC5402 датащи(PDF) 53 Page - Texas Instruments |
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TMS320VC5402 датащи(HTML) 53 Page - Texas Instruments |
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53 / 68 page ![]() TMS320VC5402 FIXEDPOINT DIGITAL SIGNAL PROCESSOR SPRS079E – OCTOBER 1998 – REVISED AUGUST 2000 53 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 instruction acquisition (IAQ), interrupt acknowledge (IACK), external flag (XF), and TOUT timings (continued) switching characteristics over recommended operating conditions for XF and TOUT [H = 0.5 tc(CO)] (see Figure 26 and Figure 27) PARAMETER MIN MAX UNIT t Delay time, CLKOUT low to XF high –1 3 ns td(XF) Delay time, CLKOUT low to XF low –1 3 ns td(TOUTH) Delay time, CLKOUT low to TOUT high 0 4 ns td(TOUTL) Delay time, CLKOUT low to TOUT low 0 4 ns tw(TOUT) Pulse duration, TOUT 2H ns XF CLKOUT td(XF) Figure 26. XF Timing TOUT CLKOUT tw(TOUT) td(TOUTL) td(TOUTH) Figure 27. TOUT Timing |
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