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AMD-K6-2E/233AMZ датащи(PDF) 63 Page - Advanced Micro Devices

номер детали AMD-K6-2E/233AMZ
подробное описание детали  AMD-K6??2E Embedded Processor
PDF  332 Pages
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производитель  AMD [Advanced Micro Devices]
домашняя страница  http://www.amd.com
Logo AMD - Advanced Micro Devices

AMD-K6-2E/233AMZ датащи(HTML) 63 Page - Advanced Micro Devices

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Chapter 3
Software Environment
45
22529B/0—January 2000
AMD-K6™-2E Processor Data Sheet
Preliminary Information
UC/WC Cacheability
Control Register
(UWCCR)
The AMD-K6-2E processor provides two variable-range Memory
Type Range Registers (MTRRs)—MTRR0 and MTRR1—that
each specify a range of memory. Each range can be defined as
uncacheable (UC) or write-combining (WC) memory. Figure 37
shows the format of the UWCCR register. For more detailed
information about the MTRR0, MTRR1, and UWCCR registers,
see “Memory Type Range Registers” on page 207.
.
Figure 37. UC/WC Cacheability Control Register (UWCCR)
Processor State
Observability
Register (PSOR)
The AMD-K6-2E processor provides the processor state
observability register (PSOR) (see Figure 38).
Figure 38. Processor State Observability Register (PSOR)
16
0
63
Physical Address Mask 0
17
31
Physical Base Address 0
1
2
Physical Address Mask 1
Physical Base Address 1
32
33
34
48
49
U
C
0
W
C
0
U
C
1
W
C
1
MTRR1
MTRR0
Symbol
Description
Bits
UC0
Uncacheable Memory Type
0
WC0
Write-Combining Memory Type
1
Symbol
Description
Bits
UC1
Uncacheable Memory Type
32
WC1
Write-Combining Memory Type
33
20
63
BF
Symbol
Description
Bit
NOL2
No L2 Functionality
8
STEP
Processor Stepping
7-4
BF
Bus Frequency Divisor
2-0
3
4
STEP
7
8
9
N
O
L
2
Reserved



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