TMD2672 datasheet(26/44 Pages) OSRAM

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ams Datasheet

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[v1-00] 2015-Mar-23

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TMD2672 − Principles of Operation

Persistence Register (0x0C)

The Persistence Register controls the filtering interrupt

capabilities of the device. Configurable filtering is provided to

allow interrupts to be generated after each ADC integration

cycle or if the ADC integration has produced a result that is

outside of the values specified by threshold register for some

specified amount of time.

Figure 32:

Persistence Register

Configuration Register (0x0D)

The Configuration Register sets the wait long time.

Figure 33:

Enable Register

PPERS

Reserved

Field

Bits

Description

PPERS

7:4

Proximity Interrupt Persistence. Controls rate of proximity interrupt to the host

processor.

Field Value

Meaning

Interrupt Persistence Function

0000

----

Every proximity cycle generates an interrupt

0001

1 proximity value out of range

0010

2 consecutive proximity values out of range

....

1111

15 consecutive proximity values out of range

Reserved

3:0

Default setting is 0x00.

Reserved

WLONG

Reserved

Field

Bits

Description

Reserved

7:2

Reserved. Write as 0.

WLONG

Wait Long. When asserted, the wait cycles are increased by a factor 12× from that

programmed in the WTIME register.

Reserved

Reserved. Write as 0.

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