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TCS3200 датащи(PDF) 13 Page - OSRAM GmbH |
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TCS3200 датащи(HTML) 13 Page - OSRAM GmbH |
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13 / 25 page ![]() Page 12 ams Datasheet Document Feedback [v1-01] 2018-Mar-14 TCS3200 − Application Information Power Supply Considerations Power supply lines must be decoupled by a 0.01μF to 0.1μF capacitor with short leads mounted close to the device package. Input Interface A low-impedance electrical connection between the device OE pin and the device GND pin is required for improved noise immunity. All input pins must be either driven by a logic signal or connected to VDD or GND - they should not be left unconnected (floating). Output Interface The output of the device is designed to drive a standard TTL or CMOS logic input over short distances. If lines greater than 12 inches are used on the output, a buffer or line driver is recommended. A high state on Output Enable (OE) places the output in a high-impedance state for multiple-unit sharing of a microcontroller input line. Power Down Powering down the sensor using S0/S1 (L/L) will cause the output to be held in a high-impedance state. This is similar to the behavior of the output enable pin, however powering down the sensor saves significantly more power than disabling the sensor with the output enable pin. Photodiode Type (Color) Selection The type of photodiode (blue, green, red, or clear) used by the device is controlled by two logic inputs, S2 and S3 (see Figure 5). Output Frequency Scaling Output-frequency scaling is controlled by two logic inputs, S0 and S1. The internal light-to-frequency converter generates a fixed-pulsewidth pulse train. Scaling is accomplished by internally connecting the pulse-train output of the converter to a series of frequency dividers. Divided outputs are 50%-duty cycle square waves with relative frequency values of 100%, 20%, and 2%. Because division of the output frequency is accomplished by counting pulses of the principal internal frequency, the final-output period represents an average of the multiple periods of the principle frequency. The output-scaling counter registers are cleared upon the next pulse of the principal frequency after any transition of the S0, S1, S2, S3, and OE lines. Application Information |
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