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TAS5162DDVR датащи(PDF) 21 Page - Texas Instruments |
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TAS5162DDVR датащи(HTML) 21 Page - Texas Instruments |
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21 / 29 page ![]() www.ti.com Mid Z Sequence Compatibility DEVICE PROTECTION SYSTEM ERROR REPORTING TAS5162 SLES194C – OCTOBER 2006 – REVISED MAY 2007 Characteristics section of this data sheet). Although being present. TI recommends monitoring the OTW not specifically required, it is a good practice to hold signal using the system microcontroller and RESET_AB and RESET_CD low during power down, responding to an overtemperature warning signal by, thus preventing audible artifacts including pops or e.g., turning down the volume to prevent further clicks. heating of the device resulting in device shutdown (OTE). When the TAS5162 is being used with TI PWM modulators such as the TAS5508, no special To reduce external component count, an internal attention to the state of RESET_AB and RESET_CD pullup resistor to 3.3 V is provided on both SD and is required, provided that the chipset is configured as OTW outputs. Level compliance for 5-V logic can be recommended. obtained by adding external pullup resistors to 5 V (see the Electrical Characteristics section of this data sheet for further specifications). The TAS5162 is compatible with the Mid Z Sequence from the TAS5086 Modulator. The Mid Z Sequence is a series of pulses that is generated by The TAS5162 contains advanced protection circuitry the modulator that causes the power stage to slowly carefully designed to facilitate system integration and enable its outputs as it begins to switch. ease of use, as well as to safeguard the device from permanent failure due to a wide range of fault By slowly starting the PWM switching, the impulse conditions such as short circuits, overload, response created by the onset of switching is overtemperature, and undervoltage. The TAS5162 reduced. This impulse response is the acoustic responds to a fault by immediately setting the power artifact that is heard in the output transducers stage in a high-impedance (Hi-Z) state and asserting (loudspeakers) and is commonly termed a "click" or the SD pin low. In situations other than overload or "pop". over temperature, the device automatically recovers when the fault condition has been removed or the The low acoustic artifact noise of TAS5162 will be gate supply voltage has increased. For highest further decreased when used in combination with a possible reliability, recovering from an TAS5086 modulator and the Mid Z sequence is overload/over-temperature fault requires external enabled. reset of the device (see the Device Reset section of The Mid Z Sequence is primarily used for the this data sheet) no sooner than 1 second after the single-ended mode of operation. It facilitates a shutdown. "softer" PWM output start after the split cap output The TAS5162 contains circuitry associated with its configuration is charged. PWM inputs that will detect the condition when a PWM input is continuously high or low. Without this protection circuitry, if a PWM input is not correct, the The SD and OTW pins are both active-low, PVDD power supply could appear on the associated open-drain outputs. Their function is for output pin. This condition could damage either the protection-mode signaling to a PWM controller or output load (loudspeaker) or the device. If a PWM other system-control device. input remains either high or low over 15 µS, the device's outputs will be set into a Hi-Z state. If this Any fault resulting in device shutdown is signaled by error condition occurs, SD will not be asserted low. the SD pin going low. Likewise, OTW goes low when the device junction temperature exceeds 125 °C (see The above mentioned operation is used for all of the the following table). BTL output modes except for Mode 0,0,1 and the Single-ended Mode 1,0,1 those are the Latching SD OTW DESCRIPTION Shutdown Modes. In the Latching Shutdown Mode, 0 0 Overtemperature (OTE) or overload (OLP) or the over current error recovery circuitry is disabled undervoltage (UVP) and an over current condition will cause the device to 0 1 Overload (OLP) or undervoltage (UVP) shutdown immediately. After shutdown, RESET_AB 1 0 Junction temperature higher than 125 °C and/or RESET_CD must be asserted to restore (overtemperature warning) normal operation after the over current condition is 1 1 Junction temperature lower than 125 °C and no removed. OLP or UVP faults (normal operation) Note that asserting either RESET_AB or RESET_CD low forces the SD signal high, independent of faults 21 Submit Documentation Feedback |
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