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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AT90USB646 датащи(PDF) 60 Page - ATMEL Corporation |
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AT90USB646 датащи(HTML) 60 Page - ATMEL Corporation |
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60 / 435 page  60 7593D–AVR–07/06 AT90USB64/128 Figure 8-1. Reset Logic Notes: 1. Values are guidelines only. Actual values are TBD. 2. The Power-on Reset will not work unless the supply voltage has been below VPOT (falling) 8.0.3 Power-on Reset A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level is defined in Table 8-1. The POR is activated whenever V CC is below the detection level. The POR circuit can be used to trigger the start-up Reset, as well as to detect a failure in supply voltage. A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the Power-on Reset threshold voltage invokes the delay counter, which determines how long the device is kept in RESET after V CC rise. The RESET signal is activated again, without any delay, when V CC decreases below the detection level. Table 8-1. Reset Characteristics (1) Symbol Parameter Condition Min Typ Max Units VPOT Power-on Reset Threshold Voltage (rising) TBD TBD TBD V Power-on Reset Threshold Voltage (falling)(2) TBD TBD TBD V VRST RESET Pin Threshold Voltage TBD TBD TBD V tRST Minimum pulse width on RESET Pin TBD TBD TBD ns MCU Status Register (MCUSR) Brown-out Reset Circuit BODLEVEL [2..0] Delay Counters CKSEL[3:0] CK TIMEOUT DATA BUS Clock Generator SPIKE FILTER Pull-up Resistor JTAG Reset Register Watchdog Oscillator SUT[1:0] Power-on Reset Circuit |
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