PCD5096 datasheet(17/52 Pages) PHILIPS

17 / 52 page

1997 Jan 22

Philips Semiconductors

Preliminary speciﬁcation

Universal codec

PCD5096

8.3.5

CONTROL REGISTER 3 (CR3)

This 16-bit register is used to adjust the reference voltage of Codec 1 and Codec 2 to 2000 mV. An accuracy of 12 mV

is guaranteed. The equation for determining the reference voltage (VREFn) for each codec is given below:

Where ‘n’ is the codec number and can take a value of ‘1’ or ‘2’. The default value for VBGP is 1.25 V but this may vary

due to process spread (see Chapter 16). Note that increasing RVnREF reduces VREFn.

For correct function of the analog blocks, care must be taken to have sensible values in CR3. For example, bits (15:14),

as well as (7:6) must be ‘10’. The state of this register after reset is A0A0H.

Table 16 Control Register 3 (address 78H)

Table 17 Control Register 3 (continued)

Table 18 Description of CR2 bits

RV2REF5

RV2REF4

RV2REF3

RV2REF2

RV2REF1

RV2REF0

76543210

RV1REF5

RV1REF4

RV1REF3

RV1REF2

RV1REF1

RV1REF0

BIT

SYMBOL

DESCRIPTION

−

This bit must be set to a logic 1.

−

This bit must be set to a logic 0.

RV2REF5

These 5 bits are used to select the reference voltage of Codec 2.

RV2REF4

RV2REF3

RV2REF2

RV2REF1

RV2REF0

−

This bit must be set to a logic 1.

−

This bit must be set to a logic 0.

RV1REF5

These 5 bits are used to select the reference voltage of Codec 1.

RV1REF4

RV1REF3

RV1REF2

RV1REF1

RV1REF0

VREFn

256

VBGP

RVnREF

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