LTM4656 datasheet(13/26 Pages) AD

13 / 26 page

LTM4712

Rev. 0

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• Tie all SS pins together

• Tie all RUN pins together

• Tie all converter inputs together

• Tie all converter outputs together

• Route one IC’s CLKOUT to another IC’s SYNC pin

Refer to the Figure 24 section for an example of a 2-phase

parallel operation design.

The LTM4712 can also be paralleled from different input

voltages for a redundancy design. Do not tie SS and RUN

pins of the LTM4712s together so each LTM4712 can

start up with different input voltages to supply current

to a single output. Any one input voltage failure does

not affect the output voltage regulation as long as the

other input sources supply enough load current. The peak

inductor currents are shared among all the buck-boost

converters by tying all the COMP pins together. In the

redundancy design, it is suggested that each LTM4712

has its own compensation network and feedback resistor

locally closed to the pin and then short the FB pins and

COMP pins all together with PCB traces.

Thermal Considerations and Output Current Derating

The thermal resistances reported in the Pin Configuration

section are consistent with those parameters defined by

JESD 51-9 and are intended for use with finite element anal-

ysis (FEA) software modeling tools that leverage the outcome

of thermal modeling, simulation, and correlation to hardware

evaluation performed on a μModule package mounted to a

hardware test board—also defined by JESD 51-9 (“Test

Boards for Area Array Surface Mount Package Thermal

Measurements”). The motivation for providing these thermal

coefficients is found in JESD 51-12 (“Guidelines for Reporting

and Using Electronic Package Thermal Information”).

Many designers may opt to use laboratory equipment and

a test vehicle such as the demo board to anticipate the

μModule regulator’s thermal performance in their appli-

cation at various electrical and environmental operating

conditions to compliment any FEA activities. Without

FEA software, the thermal resistances reported in the

Pin Configuration section are not relevant to providing

guidance of thermal performance; instead, the derating

APPLICATIONS INFORMATION

curves provided in the data sheet can be used in a manner

that yields insight and guidance pertaining to application

usage and can be adapted to correlate thermal perfor-

mance to application itself.

The Pin Configuration section typically gives four thermal

coefficients explicitly defined in JESD 51-12; these coef-

ficients are quoted or paraphrased below:

1. θJA, the thermal resistance from junction to ambient, is

the natural convection junction-to-ambient air thermal

resistance measured in a one cubic foot sealed enclo-

sure. This environment is sometimes referred to as “still

air” although natural convection causes the air to move.

This value is determined with the part mounted to a

JESD 51-9 defined test board, which does not reflect

an actual application or viable operating condition.

2. θJCbottom, the thermal resistance from junction to the

bottom of the product case, is the junction-to-board

thermal resistance with all of the component power

dissipation flowing through the bottom of the package.

In the typical μModule, the bulk of the heat flows out

the bottom of the package, but there is always heat

flow out into the ambient environment. As a result, this

thermal resistance value may be useful for compar-

ing packages, but the test conditions do not generally

match the application.

3. θJCtop, the thermal resistance from junction to top of

the product case, is determined with nearly all of the

component power dissipation flowing through the top

of the package. As the electrical connections of the

typical μModule are on the bottom of the package, it

is rare for an application to operate such that most of

the heat flows from the junction to the top of the part.

As in the case of θJCbottom, this value may be useful

for comparing packages, but the test conditions do not

generally match the application.

4. θJB, the thermal resistance from junction to the printed

circuit board, is the junction-to-board thermal resis-

tance where almost all of the heat flows through the

bottom of the μModule and into the board and is really

the sum of the θJCbottom and the thermal resistance of

the bottom of the part through the solder joints and

through a portion of the board.

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