LTM4656 datasheet(11/26 Pages) AD

11 / 26 page

LTM4712

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

Without considering the inductor current ripple, the

RMS current of the input capacitor can be estimated

with Equation 3.

ICIN(RMS) =

IOUTMAX

• D • (1– D)

(3)

where η is the estimated efficiency of the power module.

The formula has a maximum at D = 0.5 or VIN = 2VOUT,

where IIN(RMS) = IOUT(MAX)/2. This simple worst-case con-

dition is commonly used for design.

Output Decoupling Capacitors

Discontinuous current shifts from the input to the output

in the boost region. Make sure that the COUT capacitor

network is capable of reducing the output voltage rip-

ple. The effects of ESR and the bulk capacitance must be

considered when choosing the right capacitor for a given

output ripple voltage. The maximum steady state ripple

due to charging and discharging the bulk capacitance is

given by Equation 4.

∆VCAP(BOOST) =

•(VOUT VIN(MIN))

COUT • VOUT • fSW

∆VCAP(BUCK) =

VOUT •(VIN(MAX) VOUT)

8 •L • COUT • VIN(MAX) • fSW2

IOUT(MAX)

(4)

The maximum steady ripple due to the voltage drop

across the ESR is given by Equation 5.

∆VESR(BOOST) =

VOUT •IOUT

VIN(MAX)

• ESR

∆VESR(BUCK) =

VOUT •(VIN(MAX) VOUT)

VIN(MAX) •L • fSW

• ESR

(MAX)

(5)

The bulk output capacitors defined as COUT are chosen

with low enough ESR to meet the output voltage ripple

and transient requirements. COUT can be the low ESR

tantalum capacitor, the low ESR polymer capacitor, or

the ceramic capacitor. Multiple capacitors can be placed

in parallel to meet the ESR and RMS current handling

requirements. The typical capacitance is 10μF. Additional

output filtering may be required by the system designer,

if further reduction of output ripple or dynamic transient

spike is required.

Power Good (PGOOD Pin)

The PGOOD pin is connected to the open-drain of an inter-

nal N-channel MOSFET. When VFB is not within ±10% of

the 1.0V reference voltage, the PGOOD pin is pulled low.

The PGOOD pin is also pulled low when RUN is below

1.22V or when the LTM4712 is in the soft-start phase.

There is an internal 30μs delay when VFB goes in or out

of the ±10% window. The PGOOD pin can be pulled up

by an external resistor to INTVCC or an external source

of up to 6V.

Low Current Operation (MODE Pin)

In applications where fixed frequency operation is more

critical than low current efficiency, and where the low-

est output ripple is desired, forced continuous operation

should be used. Forced continuous operation is enabled

by tying the MODE pin to GND. In this mode, inductor

current is allowed to reverse during low output loads,

the COMP voltage is in control of the current comparator

threshold throughout. During start-up, forced continu-

ous mode is disabled and inductor current is prevented

from reversing until the LTM4712’s output voltage is in

regulation.

In applications where high efficiency at intermediate

current are more important than output voltage ripple,

pulse-skipping mode of operation can be selected by

floating the MODE pin to improve light load efficiency.

Constant Current Regulation (ISP, ISN, and ISET Pins)

The LTM4712 provides a constant-current regulation

loop for either input or output average current. A sens-

ing resistor close to the input or output capacitor can

be used to sense the input or output current. Because

the input or output current may be a pulse current in the

different operation regions, an RC filter has to be applied

on ISP and ISN pins for average current sensing. When

the voltage on the current sensing resistor exceeds the

programmed current limit, the voltage on the COMP pin is

pulled low to decrease the inductor current and maintain

the desired maximum input or output current. The current

limit may be set by the voltage on the ISET pin from 0.2V

to 1.2V corresponding to the linearly 0mV to 50mV across

the sensing resistor. There is a 15µA current out of the

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