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ADL7078ACPZN-R7 датащи(PDF) 17 Page - Analog Devices |
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ADL7078ACPZN-R7 датащи(HTML) 17 Page - Analog Devices |
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17 / 19 page ![]() Data Sheet ADL7078 RECOMMENDED POWER MANAGEMENT CIRCUIT analog.com Rev. 0 | 17 of 19 Figure 53 shows the recommended power management circuit for the ADL7078. The LT8607 step-down regulator is used to step down a 12 V rail to 6.62 V, which is then applied to the LT3042 low dropout (LDO) linear regulator to generate a low noise 5 V output. While the circuit shown in Figure 53 has an input voltage (VIN) of 12 V, the input range to the LT8607 can be as high as 42 V. The 6.62 V regulator output of the LT8607 is set by the R2 and R3 resistors according to the following equation: R2 = R3((VOUT/0.778 V) − 1), where VOUT is the output voltage. The switching frequency (fSW) is set to 2 MHz by the 18.2 kΩ resistor on the RT pin of the LT8697. The LT8607 data sheet provides a table of resistor values that can be used to select other fSW values ranging from 0.2 MHz to 2.200 MHz. VOUT = 100 μA × R4 The PGFB resistors of the LT3042 are chosen to trigger the power- good (PG) signal when the output is just under 95% of the target voltage of 5 V. The output of the LT3042 has 1% initial tolerance and another 1% variation over temperature. The PGFB tolerance is roughly 3% over temperature and adding resistors results in a bit more (5%), therefore, putting 5% between the output and the PGFB resistors works well. In addition, the PG open collector is pulled up to the 5 V output to give a convenient 0 V to 5 V voltage range. Figure 53. Recommended Power Management Circuit |
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