CDP1802ACE datasheet(21/28 Pages) INTERSIL

номер детали	CDP1802ACE

подробное описание детали	CMOS 8-Bit Microprocessors

PDF	28 Pages

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производитель	INTERSIL [Intersil Corporation]

домашняя страница	http://www.intersil.com/cda/home

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3-23

loaded into D, and R(N) is incremented by 1.

FIGURE 25. STATE TRANSITION DIAGRAM

TABLE 1. INSTRUCTION SUMMARY (SEE NOTES)

INSTRUCTION

MNEMONIC

CODE

OPERATION

MEMORY REFERENCE

LOAD VIA N

LDN

M(R(N))

→ D; FOR N not 0

LOAD ADVANCE

LDA

M(R(N))

→ D; R(N) + 1 → R(N)

LOAD VIA X

LDX

M(R(X))

→ D

LOAD VIA X AND ADVANCE

LDXA

M(R(X))

→ D; R(X) + 1 → R(X)

LOAD IMMEDIATE

LDl

M(R(P))

→ D; R(P) + 1 → R(P)

STORE VIA N

STR

→ M(R(N))

STORE VIA X AND DECREMENT

STXD

→ M(R(X)); R(X) - 1 → R(X)

INCREMENT REG N

INC

R(N) + 1

→ R(N)

DECREMENT REG N

DEC

R(N) - 1

→ R(N)

INCREMENT REG X

IRX

R(X) + 1

→ R(X)

GET LOW REG N

GLO

R(N).0

→ D

PUT LOW REG N

PLO

→ R(N).0

GET HIGH REG N

GHl

R(N).1

→ D

PUT HIGH REG N

PHI

→ R(N).1

LOGIC OPERATIONS (Note 1)

M(R(X)) OR D

→ D

OR IMMEDIATE

ORl

M(R(P)) OR D

→ D; R(P) + 1 → R(P)

S2 DMA

S1 RESET

S1 EXECUTE

S0 FETCH

S3 INT

S1 INIT

DMA

• INT

DMA

IDLE

• DMA • INT

FORCE S1

(LONG BRANCH,

DMA

• IDLE • INT

DMA

INT

• DMA

LONG SKIP, NOP, ETC.)

PRIORITY: FORCE S0, S1

DMA IN

DMA OUT

INT

• DMA

CDP1802A, CDP1802AC, CDP1802BC

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