CDP1802ACE datasheet(19/28 Pages) INTERSIL

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The three paths, depending on the nature of the instruction,

may operate independently or in various combinations in the

same machine cycle.

With two exceptions, CPU instruction consists of two 8-

clock-pulse machine cycles. The first cycle is the fetch cycle,

and the second - and third if necessary - are execute cycles.

During the fetch cycle the four bits in the P designator select

one of the 16 registers R(P) as the current program counter.

The selected register R(P) contains the address of the mem-

ory location from which the instruction is to be fetched. When

the instruction is read out from the memory, the higher order

4 bits of the instruction byte are loaded into the register and

the lower order 4 bits into the N register. The content of the

program counter is automatically incremented by one so that

R(P) is now “pointing” to the next byte in the memory.

The X designator selects one of the 16 registers R(X) to

“point” to the memory for an operand (or data) in certain ALU

or I/O operations.

The N designator can perform the following five functions

depending on the type of instruction fetched:

1. Designate one of the 16 registers in R to be acted upon

during register operations.

2. Indicate to the I/O devices a command code or device

selection code for peripherals.

3. Indicate the specific operation to be executed during the

ALU instructions, types of test to be performed during the

Branch instruction, or the specific operation required in a

class of miscellaneous instructions (70 - 73 and 78 - 7B).

4. Indicate the value to be loaded into P to designate a new

5. Indicate the value to be loaded into X to designate a new

The registers in R can be assigned by a programmer in three

different ways: as program counters, as data pointers, or as

scratchpad locations (data registers) to hold two bytes of data.

Program Counters

Any register can be the main program counter; the address

of the selected register is held in the P designator. Other reg-

isters in R can be used as subroutine program counters. By

single instruction the contents of the P register can be

changed to effect a “call” to a subroutine. When interrupts

are being serviced, register R(1) is used as the program

counter for the user's interrupt servicing routine. After reset,

and during a DMA operation, R(0) is used as the program

counter. At all other times the register designated as pro-

gram counter is at the discretion of the user.

Data Pointers

The registers in R may be used as data pointers to indicate a

location in memory. The register designated by X (i.e., R(X))

points to memory for the following instructions (see Table 1).

1. ALU operations F1 - F5, F7, 74, 75, 77

2. Output instructions 61 through 67

3. Input instructions 69 through 6F

4. Certain miscellaneous instructions - 70 - 73, 78, 60, F0

The register designated by N (i.e., R(N)) points to memory

for the “load D from memory” instructions 0N and 4N and the

“Store D” instruction 5N. The register designated by P (i.e.,

the program counter) is used as the data pointer for ALU

instructions F8 - FD, FF, 7C, 7D, 7F. During these instruction

executions, the operation is referred to as “data immediate”.

Another important use of R as a data pointer supports the

built-in Direct-Memory-Access (DMA) function. When a

DMA-ln or DMA-Out request is received, one machine cycle

is “stolen”. This operation occurs at the end of the execute

machine cycle in the current instruction. Register R(0) is

always used as the data pointer during the DMA operation.

The data is read from (DMA-Out) or written into (DMA-ln) the

memory location pointed to by the R(0) register. At the end

of the transfer, R(0) is incremented by one so that the pro-

cessor is ready to act upon the next DMA byte transfer

request. This feature in the 1800-series architecture saves a

substantial amount of logic when fast exchanges of blocks of

data are required, such as with magnetic discs or during

CRT-display-refresh cycles.

Data Registers

When registers in R are used to store bytes of data, four

instructions are provided which allow D to receive from or

write into either the higher-order or lower-order byte portions

of the register designated by N. By this mechanism (together

with loading by data immediate) program pointer and data

pointer designations are initialized. Also, this technique

allows scratchpad registers in R to be used to hold general

data. By employing increment or decrement instructions,

such registers may be used as loop counters.

The Q Flip-Flop

An internal flip-flop, Q, can be set or reset by instruction and

can be sensed by conditional branch instructions. The output

of Q is also available as a microprocessor output.

CDP1802A, CDP1802AC, CDP1802BC

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