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TPS274C65AS датащи(PDF) 64 Page - Texas Instruments |
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TPS274C65AS датащи(HTML) 64 Page - Texas Instruments |
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64 / 87 page ![]() Table 9-46. DEV_CONFIG2 Register Field Descriptions (continued) Bit Field Type Reset Description 3-0 ILIM_REG_34 R/W Ah Sets the current limit regulation value during overcurrent or short circuit events(Ch3 and Ch4). 0h = 0.25A 1h = 0.33A 2h = 0.4A 3h = 0.48A 4h = 0.56A 5h = 0.67A 6h = 0.72A 7h = 0.85A 8h = 1A 9h = 1.1A Ah = 1.25A Bh = 1.5A Ch = 1.6A Dh = 1.75A Eh = 1.9A Fh = 2.2A 9.6.35 DEV_CONFIG3 Register (Offset = 23h) [Reset = 00h] DEV_CONFIG3 is shown in Table 9-47. Return to the Summary Table. Device Configuration register - RCB function disable in all channels,Sense current range Inrush current Limit level config, Parallel chanel config Inrush current Limit level config, ILIM type config inrush or current limit duration Table 9-47. DEV_CONFIG3 Register Field Descriptions Bit Field Type Reset Description 7 RCB_DIS R/W 0h Setting this bit to 1, disable RCB function in all channels 0h = RCB FET gate output set per channel. 1h = Disables RCB function 6 ILIM_SET R/W 0h Set this bit to allow CH1/CH2 to have different current limit setting than CH3/CH4 0h = Current Limit / inrush deay the same for all channels as in register DEV_CONFIG1 1h = Current limit / inrsh delay set differenty for CH1/CH2 (as in DEV_CONFIG1) and C3/CH4 (DEV_CONFIG2) 5 ISNS_RANGE R/W 0h Sets the load current sense range - optimizing the current sense output 0h = Load current to be sensed less than or equal to 800 mA 1h = Load current to be sensed more than 800 mA 4 PARALLEL_34 R/W 0h Set this bit to 1 to signal that channels 3 and 4 (CH3 and CH4) are paralleled. Write to this bit is valid only when all four SW_STATE bits are 0 and not rewritten to 1 in the same frame. 0h = CH3 and CH4 are not paralleled together 1h = CH3 and CH4 are paralleled together 3 PARALLEL_12 R/W 0h Set this bit to 1 to signal that channels 1 and 2(CH1 and CH2) are paralleled. Write to this bit is valid only when all four SW_STATE bits are 0 and not rewritten to 1 in the same frame. 0h = CH1 and CH2 are not paralleled together 1h = CH1 and CH2 are paralleled together 2 ILIM_CONFIG R/W 0h Set this bit to 1 to have the ILIM duration applied as the period of inrush current limit or to set as the duration of current limiting before switching off the FET. 0h = ILIM duratiion set as the period of inrush current limit 1h = ILIM duration set as the period of current limiting before switching off FET TPS274C65 SLVSFZ2B – APRIL 2023 – REVISED OCTOBER 2023 www.ti.com 64 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TPS274C65 |
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