LD7577 datasheet(12/18 Pages) LEADTREND

12 / 18 page

LD7577

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD7577-DS-01 January 2009

Fig. 17

OVP (Over Voltage Protection) on Vcc

The VGS ratings of the nowadays power MOSFETs are

mostly with 30V maximum. To prevent the VGS from fault

condition, the LD7577 is implemented with over-voltage

protection on Vcc.

As long as the Vcc voltage is higher

than OVP threshold voltage, the output gate drive circuit will

be shut down, thus to stop the switching of the power

MOSFET until the next UVLO(ON).

The Vcc OVP function in the LD7577 is an auto-recovery

type protection.

If the OVP condition, usually caused by

the feedback loop opened, is not released, the Vcc will trip

to the OVP level again, re-shutting down the output.

The

Vcc waveform in Fig. 18 shows this auto-recovery type

protection, presenting a hiccup mode.

On the other hand, the removal of the OVP condition should

render the Vcc level back to normal level, causing the output

automatically returning to the normal operation.

Fig. 18

Brownout Protection & Line voltage OVP

(Over voltage protection)

The LD7577 is programmable to set the brownout protection

point and the line voltage OVP point though BNO pin.

The voltage across the BNO pin is proportional to the bulk

capacitor voltage, referred as the line voltage.

A brownout

comparator is implemented to detect the abnormal line

condition. As soon as the condition is detected, it will shut

down the controller to prevent the damage.

Figure 19

shows the operation.

When VBNO falls below 0.95V, the

gate output will be kept off even Vcc has already achieved

UVLO(ON). It therefore makes Vcc hiccup between UVLO(ON)

and UVLO(OFF). Unless the line voltage is large enough to

pull VBNO larger than 1.05V, the gate output will not start

switching even when the next UVLO(ON) is tripped. A

hysteresis is implemented to prevent the false trigger during

turn-on and turn-off.

The comparator built in BNO will disable switching from

Gate-out as soon as it detects excessive high line voltage

and BNO voltage over 4.0V. VCC will then operate in hiccup

mode between UVLO-on and UVLO-off. The Gate-out will

not resume switching until VBNO falls below 3.8V.

Therefore, it can prevent excessive high line voltage from

damaging the external components. Fig. 20 shows the

operation.

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