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NIF9N05CLT1 датащи(PDF) 1 Page - ON Semiconductor

номер детали NIF9N05CLT1
подробное описание детали  Protected Power MOSFET
PDF  6 Pages
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производитель  ONSEMI [ON Semiconductor]
домашняя страница  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NIF9N05CLT1 датащи(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 5
1
Publication Order Number:
NIF9N05CL/D
NIF9N05CL
Protected Power MOSFET
2.6 A, 52 V, N−Channel, Logic Level,
Clamped MOSFET w/ ESD Protection
in a SOT−223 Package
Benefits
• High Energy Capability for Inductive Loads
• Low Switching Noise Generation
Features
• Diode Clamp Between Gate and Source
• ESD Protection − HBM 5000 V
• Active Over−Voltage Gate to Drain Clamp
• Scalable to Lower or Higher RDS(on)
• Internal Series Gate Resistance
• Pb−Free Packages are Available
Applications
• Automotive and Industrial Markets:
Solenoid Drivers, Lamp Drivers, Small Motor Drivers
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain−to−Source Voltage Internally Clamped
VDSS
52−59
V
Gate−to−Source Voltage − Continuous
VGS
±15
V
Drain Current
− Continuous @ TA = 25°C
− Single Pulse (tp = 10 ms) (Note 1)
ID
IDM
2.6
10
A
Total Power Dissipation @ TA = 25°C (Note 1)
PD
1.69
W
Operating and Storage Temperature Range
TJ, Tstg
−55 to 150
°C
Single Pulse Drain−to−Source
Avalanche Energy (VDD = 50 V, ID(pk) = 1.17
A, VGS = 10 V, L = 160 mH, RG = 25 W)
EAS
110
mJ
Thermal Resistance,
Junction−to−Ambient (Note 1)
Junction−to−Ambient (Note 2)
RqJA
RqJA
74
169
°C/W
Maximum Lead Temperature for Soldering
Purposes, 1/8
″ from Case for 10 Seconds
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to a FR4 board using 1
″ pad size, (Cu area 1.127 in2).
2. When surface mounted to a FR4 board using minimum recommended pad
size, (Cu area 0.412 in2).
MPWR
Gate
(Pin 1)
RG
Overvoltage
Protection
ESD Protection
http://onsemi.com
SOT−223
CASE 318E
STYLE 3
DRAIN
GATE
DRAIN
SOURCE
(Top View)
MARKING DIAGRAM
A
= Assembly Location
Y
= Year
W
= Work Week
F9N05 = Specific Device Code
G
= Pb−Free Package
1
2
3
4
VDSS
(Clamped)
RDS(ON) TYP
ID MAX
52 V
107 m
W
2.6 A
Source
(Pin 3)
Drain
(Pins 2, 4)
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
(Note: Microdot may be in either location)


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