AT45DB642D datasheet(24/55 Pages) ATMEL

24 / 55 page

3542F–DFLASH–09/06

AT45DB642D

12. Deep Power-down

After initial power-up, the device will default in standby mode. The Deep Power-down command

allows the device to enter into the lowest power consumption mode. To enter the Deep Power-

down mode, the CS pin must first be asserted. Once the CS pin has been asserted, an opcode

of B9H command must be clocked in via input pins (SI or IO

7-IO0). After the last bit of the com-

mand has been clocked in, the CS pin must be de-asserted to initiate the Deep Power-down

operation. After the CS pin is de-asserted, the will device enter the Deep Power-down mode

within the maximum t

EDPD time. Once the device has entered the Deep Power-down mode, all

instructions are ignored except for the Resume from Deep Power-down command.

Figure 12-1. Deep Power-down

12.1

Resume from Deep Power-down

The Resume from Deep Power-down command takes the device out of the Deep Power-down

mode and returns it to the normal standby mode. To Resume from Deep Power-down mode, the

CS pin must first be asserted and an opcode of ABH command must be clocked in via input pins

(SI or IO

7-IO0). After the last bit of the command has been clocked in, the CS pin must be de-

asserted to terminate the Deep Power-down mode. After the CS pin is de-asserted, the device

will return to the normal standby mode within the maximum t

RDPD time. The CS pin must remain

high during the t

RDPD time before the device can receive any commands. After resuming form

Deep Power-down, the device will return to the normal standby mode.

Figure 12-2. Resume from Deep Power-Down

Command

Serial/8-bit

Opcode

Deep Power-down

Both

B9H

Opcode

Each transition

represents 8 bits

SI or IO

7 - IO0

Command

Serial/8-bit

Opcode

Resume from Deep Power-down

Both

ABH

Opcode

Each transition

represents 8 bits

SI or IO

7 - IO0

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