AT45DB642D datasheet(23/55 Pages) ATMEL

23 / 55 page

3542F–DFLASH–09/06

AT45DB642D

If a sector is programmed or reprogrammed sequentially page by page, then the programming

algorithm shown in Figure 26-1 (page 48) is recommended. Otherwise, if multiple bytes in a

page or several pages are programmed randomly in a sector, then the programming algorithm

shown in Figure 26-2 (page 49) is recommended. Each page within a sector must be

updated/rewritten at least once within every 10,000 cumulative page erase/program operations

in that sector.

11.4

Status Register Read

The status register can be used to determine the device’s ready/busy status, page size, a Main

Memory Page to Buffer Compare operation result, the Sector Protection status or the device

density. To read the status register, an opcode of D7H must be loaded into the device. After the

opcode is clocked in, the 1-byte status register will be clocked out on the output pins (SO or

I/O7 - I/O0), starting with the next clock cycle. In case of applications with 8-bit interface, opcode

D7H and two dummy clock cycles should be used. When using the serial interface, the data in

the status register, starting with the MSB (bit 7), will be clocked out on the SO pin during the next

eight clock cycles. After the one byte of the status register has been clocked out, the sequence

will repeat itself (as long as CS remains low and SCK/CLK is being toggled). The data in the sta-

tus register is constantly updated, so each repeating sequence will output new data.

Ready/busy status is indicated using bit 7 of the status register. If bit 7 is a 1, then the device is

not busy and is ready to accept the next command. If bit 7 is a 0, then the device is in a busy

state. Since the data in the status register is constantly updated, the user must toggle SCK/CLK

pin to check the ready/busy status. There are several operations that can cause the device to be

in a busy state: Main Memory Page to Buffer Transfer, Main Memory Page to Buffer Compare,

Buffer to Main Memory Page Program, Main Memory Page Program through Buffer, Page

Erase, Block Erase, Sector Erase, Chip Erase and Auto Page Rewrite.

The result of the most recent Main Memory Page to Buffer Compare operation is indicated using

bit 6 of the status register. If bit 6 is a 0, then the data in the main memory page matches the

data in the buffer. If bit 6 is a 1, then at least one bit of the data in the main memory page does

not match the data in the buffer.

Bit 1 in the Status Register is used to provide information to the user whether or not the sector

protection has been enabled or disabled, either by software-controlled method or hardware-con-

trolled method. A logic 1 indicates that sector protection has been enabled and logic 0 indicates

that sector protection has been disabled.

Bit 0 in the Status Register indicates whether the page size of the main memory array is config-

ured for “power of 2” binary page size (1024 bytes) or standard DataFlash page size

(1056 bytes). If bit 0 is a 1, then the page size is set to 1024 bytes. If bit 0 is a 0, then the page

size is set to 1056 bytes.

The device density is indicated using bits 5, 4, 3, and 2 of the status register. For the

AT45DB642D, the four bits are 1111 The decimal value of these four binary bits does not equate

to the device density; the four bits represent a combinational code relating to differing densities

of DataFlash devices. The device density is not the same as the density code indicated in the

JEDEC device ID information. The device density is provided only for backward compatibility.

Table 11-1.

Status Register Format

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

RDY/BUSY

COMP

PROTECT

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