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WM8985GEFL/R датащи(PDF) 103 Page - Wolfson Microelectronics plc

номер детали WM8985GEFL/R
подробное описание детали  Multimedia CODEC With Class D Headphone and Line Out
PDF  118 Pages
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производитель  WOLFSON [Wolfson Microelectronics plc]
домашняя страница  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8985GEFL/R датащи(HTML) 103 Page - Wolfson Microelectronics plc

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Pre-Production
WM8985
w
PP, Rev 3.5, January 2007
103
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
5
RIN2INPPGA
1
Connect RIN pin to right channel input PGA
negative terminal.
0=RIN not connected to input PGA
1=RIN connected to right channel input PGA
amplifier negative terminal.
Input Signal
Path
4
RIP2INPPGA
1
Connect RIP pin to right channel input PGA
amplifier positive terminal.
0 = RIP not connected to input PGA
1 = right channel input PGA amplifier positive
terminal connected to RIP (constant input
impedance)
Input Signal
Path
3
0
Reserved. Initialise to 0
2
L2_2INPPGA
0
Connect L2 pin to left channel input PGA
positive terminal.
0=L2 not connected to input PGA
1=L2 connected to input PGA amplifier positive
terminal (constant input impedance).
Input Signal
Path
1
LIN2INPPGA
1
Connect LIN pin to left channel input PGA
negative terminal.
0=LIN not connected to input PGA
1=LIN connected to input PGA amplifier
negative terminal.
Input Signal
Path
0
LIP2INPPGA
1
Connect LIP pin to left channel input PGA
amplifier positive terminal.
0 = LIP not connected to input PGA
1 = input PGA amplifier positive terminal
connected to LIP (constant input impedance)
Input Signal
Path
8
INPPGAU
N/A
INPPGAVOLL and INPPGAVOLR volume do
not update until a 1 is written to
INPPGAUPDATE (in reg 45 or 46)
Input Signal
Path
7
INPPGAZCL
0
Left channel input PGA zero cross enable:
0=Update gain when gain register changes
1=Update gain on 1
st zero cross after gain
register write.
Input Signal
Path
6
INPPGAMUTEL
0
Mute control for left channel input PGA:
0=Input PGA not muted, normal operation
1=Input PGA muted (and disconnected from the
following input BOOST stage).
Input Signal
Path
45 (2Dh)
5:0
INPPGAVOLL
010000
Left channel input PGA volume
000000 = -12dB
000001 = -11.25db
.
010000 = 0dB
.
111111 = 35.25dB
Input Signal
Path
8
INPPGAU
N/A
INPPGAVOLL and INPPGAVOLR volume do
not update until a 1 is written to
INPPGAUPDATE (in reg 45 or 46)
Input Signal
Path
7
INPPGAZCR
0
Right channel input PGA zero cross enable:
0=Update gain when gain register changes
1=Update gain on 1st zero cross after gain
register write.
Input Signal
Path
46 (2Eh)
6
INPPGAMUTER
0
Mute control for right channel input PGA:
0=Input PGA not muted, normal operation
1=Input PGA muted (and disconnected from the
following input BOOST stage).
Input Signal
Path



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