WM8985GEFLSLASHR datasheet(96/118 Pages) WOLFSON

96 / 118 page

WM8985

Pre-Production

PP, Rev 3.5, March 2007

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

7:0

DACVOLL

11111111

Left DAC Digital Volume Control

0000 0000 = Digital Mute

0000 0001 = -127dB

0000 0010 = -126.5dB

... 0.5dB steps up to

1111 1111 = 0dB

Digital to

Analogue

Converter

(DAC)

DACVU

N/A

DAC left and DAC right volume do not update

until a 1 is written to DACVU (in reg 11 or 12)

Output Signal

Path

12 (0Ch)

7:0

DACVOLR

11111111

Right DAC Digital Volume Control

0000 0000 = Digital Mute

0000 0001 = -127dB

0000 0010 = -126.5dB

... 0.5dB steps up to

1111 1111 = 0dB

Output Signal

Path

Reserved. Initialise to 0

7:4

JD_EN1

0000

Output enabled when selected jack detection

input is logic 1

[4]= OUT1_EN_1

[5]= OUT2_EN_1

[6]= OUT3_EN_1

[7]= OUT4_EN_1

Output

Switching

(Jack Detect)

13 (0Dh)

3:0

JD_EN0

0000

Output enabled when selected jack detection

input is logic 0.

[0]= OUT1_EN_0

[1]= OUT2_EN_0

[2]= OUT3_EN_0

[3]= OUT4_EN_0

Output

Switching

(Jack Detect)

HPFEN

High Pass Filter Enable

0=disabled

1=enabled

Analogue to

Digital

Converter

(ADC)

HPFAPP

Select audio mode or application mode

0=Audio mode (1

st order, fc = ~3.7Hz)

1=Application mode (2nd order, fc = HPFCUT)

Analogue to

Digital

Converter

(ADC)

6:4

HPFCUT

000

Application mode cut-off frequency

See Figure 15 for details.

Analogue to

Digital

Converter

(ADC)

ADCOSR

128

ADC oversample rate select

0 = 64x (lowest power)

1 = 128x (best SNR)

Power

Management

Reserved. Initialise to 0

ADCRPOL

ADC right channel polarity adjust:

0=normal

1=inverted

Analogue to

Digital

Converter

(ADC)

14 (0Eh)

ADCLPOL

ADC left channel polarity adjust:

0=normal

1=inverted

Analogue to

Digital

Converter

(ADC)

15 (0Fh)

ADCVU

N/A

ADC left and ADC right volume do not update

until a 1 is written to ADCVU (in reg 16 or 17)

Analogue to

Digital

Converter

(ADC)

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