Production Data

WM8766

w

PD Rev 4.1 July 2005

25

AUTOMUTE

The WM8766 can automute by counting zero samples on the DIN1/2/3 inputs. When 1024 zero

samples are counted on one channel, one of three internal zero flags (zflag1/2/3 shown in figure 2) is

raised. Depending on the external hardware and settings of DZFM, MPD and IZD, different automute

operations are possible.

MUTE PIN AS OUTPUT

If the MUTE pin is connected to a high impedance (input to external mute circuitry for example) or left

floating, zflag1/2/3 will be output on the Mute pin dependent on DZFM settings. This is described in

Table 12 below. The output impedance of the MUTE pin is 10kOhms

DZFM [1:0]

CONDITION UNDER WHICH

MUTE PIN DRIVEN HIGH

00

Zflag1/2/3 all high

01

Zflag1 high

10

Zflag2 high

11

Zflag3 high

Table 12 Effect of DZFM on Mute Pin Decode

When the Mute pin is used as an output, its logic level remains connected to the DZFM selector

inside the chip (see figure 1). So, when the WM8766 drives the Mute pin high, the output DACs will

also softmute as described by Table 13.

MPD

DZFM [1:0]

CHANNELS MUTED WHEN

MUTE PIN DRIVEN HIGH

0

00

All Channels

0

01

CH1

0

10

CH2

0

11

CH3

1

00

All Channels

1

01

All Channels

1

10

All Channels

1

11

All Channels

Table 13 Mute Pin Decode when Mute Pin as Output

INFINITE ZERO DETECT

When it is set, the IZD register causes an analogue mute of the DAC channel output amplifier both

when there are 1024 zeros on that channel’s DIN pin or when it is manually muted by DMUTE or

MUTEALL.

REGISTER ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

0000010

DAC Channel Control

4

IZD

0

IZD Enable

0 : Disable infinite zero mute

1: Enable infinite zero mute

This operation is only available in software mode and can sometimes create a very small click at the

output of the device.