WM8738

Production Data

w

PD Rev 4.4 August 2006

14

DIGITAL AUDIO INTERFACES

The WM8738 has two data output formats, selectable via the FMT pin.

FMT = 0

ADC audio data output is I

FMT = 1

ADC audio data output is Left Justified

Both of these modes are MSB first.

The digital audio interface takes the data from the internal ADC digital filter. SDATO is the formatted

digital audio data stream output from the ADC digital filters with left and right channels multiplexed

together. LRCLK is an alignment clock that controls whether Left or Right channel data is present on

the SDATO line. SDATO and LRCLK are synchronous with the BCLK signal with each data bit

transition signified by a low to high BCLK transition.

LEFT JUSTIFIED MODE

In left justified mode, the MSB of the ADC data is output on SDATO and changes on the same falling

edge of BCLK as LRCLK and may be sampled on the rising edge of BCLK. LRCLK is high during

the left samples and low during the right samples.

L EF T CH ANNEL

R I GHT CHANNEL

L RCL K

BCL K

SD ATO

1/fs

n

3

2

1n-2 n-1

LSB

MSB

n

3

2

1n-2 n-1

LSB

MSB

Figure 4 Left Justified Mode Timing Diagram

I

In I

BCLK following an LRCLK transition and may be sampled on the rising edge of BCLK. LRCLK is low

during the left samples and high during the right samples.

LEFT C H AN N EL

R IGH T C H AN N EL

LR C L K

BC L K

SD ATO

1/fs

n

3

2

1n-2 n-1

LSB

MSB

n

3

2

1n-2 n-1

LSB

MSB

1 BCLK

1 BCLK

Figure 5 I