WM8725

Production Data

w

PD Rev 4.1 August 2004

5

ELECTRICAL CHARACTERISTICS

Test Conditions

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Digital Logic Levels

Input LOW level

0.8

V

Input HIGH level

2.0

V

Analogue Output Levels

To midrail or AC coupled

(5V supply)

1

kΩ

Load Resistance

To midrail or AC coupled

(3V supply)

1

kΩ

Maximum capacitance load

5V or 3V

100

pF

Output DC level

V

Reference Levels

Potential divider resistance

80

100

120

kΩ

Voltage at CAP

VDD = 5V

2.3

2.5

2.7

V

DAC Circuit Specifications

SNR (Note 1)

VDD = 5V

90

99

dB

VDD = 3V

97

dB

Full scale output voltage

Into 10kohm VDD = 5V, 0dB

0.9

1.0

1.1

Into 10kohm VDD = 3V, 0dB

0.6

THD (Full scale)

0dB

0.01

0.02

%

THD+N (Dynamic range)

-60dB

92

dB

Frequency response

0

20,000

Hz

Transition band

20,000

Hz

Out of band rejection

-40

dB

Channel Separation

90

dB

Gain mismatch

channel-to-channel

±1

±5

%FSR

Audio Data Input and System Clock Timing Information

BCKIN pulse cycle time

100

ns

BCKIN pulse width high

50

ns

BCKIN pulse width low

50

ns

BCKIN rising edge to LRCIN edge

30

ns

LRCIN rising edge to BCKIN

rising edge

30

ns

DIN setup time

30

ns

DIN hold time

30

ns

System clock pulse width high

13

ns

System clock pulse width low

13

ns

Notes:

1.

Ratio of output level with 1kHz full scale input, to the output level with all zeros into the digital input, measured

“A” weighted over a 20Hz to 20kHz bandwidth.

2.

All performance measurements done with 20kHz low pass filter. Failure to use such a filter will result in higher

THD+N and lower SNR and Dynamic Range readings than are found in the Electrical Characteristics. The low pass

filter removes out of band noise; although it is not audible, it may affect dynamic specification values.