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M65KA128AL датащи(PDF) 10 Page - STMicroelectronics |
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M65KA128AL датащи(HTML) 10 Page - STMicroelectronics |
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10 / 53 page ![]() Signal descriptions M65KA128AL 10/53 2.8 Clock Input (K) The Clock signal, K, is used to clock the Read and Write cycles. During normal operation, the Clock Enable pin, KE, is High, VIH. The clock signal K can be suspended to switch the device to the Self Refresh, Power-Down or Deep Power-Down mode by driving KE Low, VIL. 2.9 Clock Enable (KE) The Clock Enable, KE, pin is used to control the synchronizing of the signals to Clock signal K. The signals are clocked when KE is High, VIH When KE is Low, VIL, the signals are no longer clocked and data Read and Write cycles are extended. KE is also involved in switching the device to the Self Refresh, Power-Down and Deep Power-Down modes. 2.10 Lower/Upper Data Input/Output Mask (LDQM/UDQM) Lower Data Input/Output Mask and Upper Data Input/Output Mask pins are input signals used to control the Input and Output buffers, respectively. During Read operations, LDQM and UDQM control the Output buffer. When both LDQM and UDQM are High, VIH, the Output buffer is disabled. When held Low, VIL, the Output buffer is enabled. LDQM and UDQM are used to mask the data read or written from or to the memory array. LDQM Low, VIL, gates the data from or to the Lower Byte Data I/O (DQ0 to DQ7) while UDQM Low, gates the data from or to the Upper Byte Data I/Os (DQ8 to DQ15). During read operations, the latency between LDQM/UDQM High or Low and data output disabled or enabled is two clock cycles. During write operations, there is no latency between LDQM/UDQM stable and data input valid. 2.11 VDD Supply Voltage VDD provides the power supply to the internal core of the memory device. It is the main power supply for all operations (Read and Write). 2.12 VDDQ Supply Voltage VDDQ provides the power supply to the I/O pins and enables all Outputs to be powered independently of VDD. VDDQ can be tied to VDD or can use a separate supply. It is recommended to power-up and power-down VDD and VDDQ together to avoid certain conditions that would result in data corruption. 2.13 VSS Ground Ground, VSS, is the reference for the core power supply. It must be connected to the system ground. |
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