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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ES9080 датащи(PDF) 68 Page - ESS Technology,Inc |
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ES9080 датащи(HTML) 68 Page - ESS Technology,Inc |
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68 / 146 page  CONFIDENTIAL ADVANCE INFORMATION 0.4.3 ES9080 Product Datasheet ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM 68 Register 51: FORCE PLL LOCK CONFIG Bits [7] [6:0] Default 1'b0 7'd0 Bits Mnemonic Description [7] FORCE_PLL_LOCK • 1'b0: PLL clock status is indicated by PLL_LOCKED: 0->PLL unlocked, 1->PLL locked (default) • 1'b1: Ignores PLL_LOCKED and forces PLL clock status to be locked Note: This must be set to ensure the DAC does not mute itself [6:0] RESERVED NA Register 52: SPDIF CONFIG Bits [7:6] [5:4] [3:0] Default 2'd0 2'd0 4'b0000 Bits Mnemonic Description [7:6] SPDIF2_SEL Selects 2nd SPDIF encoder input. • 2'b00: Ch1/2 • 2'b01: Ch3/4 • 2'b10: Ch5/6 • 2'b11: Ch7/8 [5:4] SPDIF1_SEL Selects 1st SPDIF encoder input. • 2'b00: Ch1/2 • 2'b01: Ch3/4 • 2'b10: Ch5/6 • 2'b11: Ch7/8 [3:0] RESERVED NA |
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