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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ES9018 датащи(PDF) 32 Page - ESS Technology,Inc |
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ES9018 датащи(HTML) 32 Page - ESS Technology,Inc |
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32 / 54 page  2.3 ES9018S Product Datasheet ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM 32 Read Only Registers Register 27: STATUS Bits [7:4] [3] [2] [1] [0] Default - - - - - Bits Mnemonic Description [7:4] RESERVED NA [3] DSD_PCM DSD or PCM status bit. • 1'b1: DSD mode • 1'b0: I2S or SPDIF mode [2] SPDIF_VALID Valid SPDIF data status bit. • 1'b1: The SPDIF data is valid • 1'b0: The SPDIF data is invalid [1] SPDIF_EN SPDIF enabled status bit. • 1'b0: SPDIF mode is currently disabled. • 1'b1: SPDIF mode is currently enabled. Note: This can be done manually by setting SPDIF_EN_R (Register 8) or by having SPDIF_AUTODETECT enabled with valid SPDIF data on the input. [0] LOCK Jitter Eliminator lock status bit. • 1'b1:The Jitter Eliminator is locked to an incoming signal • 1'b0: The Jitter Eliminator is not locked to an incoming signal Register 31-28: DPLL NUM Bits [31:0] Default - Bits Mnemonic Description [31:0] DPLL_NUM This is a read-only 32 bit value that can be used to calculate the sample rate. The sample rate can be calculated using: Note: Fin must be divided by 64 for I2S data. ������������������ = ������������������������_������������������ ∗ ������������������������������������������������ 232 |
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