MP8794

– 16V, 20A, SYNCHRONOUS STEP-DOWN CONVERTER

MP8794 Rev. 1.0

www.MonolithicPower.com

20

12/2/2019

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PCB Layout Guidelines

Efficient

PCB

layout

is

critical for

stable

operation. For the best results, refer to Figure 6

and follow the guidelines below:

1. Place the input MLCC capacitors as close to

VIN and PGND as possible.

2. Place the major MLCC capacitors on the

same layer as the MP8794.

3. Maximize the VIN and PGND copper plane

to minimize the parasitic impedance.

4. Use as many PGND vias as possible, and

place them close to PGND to minimize both

parasitic impedance and thermal resistance.

5. Place the VCC decoupling capacitor close

to the device.

6. Connect AGND and PGND at the point of

the VCC capacitor

’s ground connection.

7. Place the BST capacitor as close to BST

and SW as possible with traces 20 mil or

wider to route the path. It is recommended

to use a bootstrap capacitor between 0.1µF

and 1µF.

8. Place the SS capacitor close to REF/TRK to

VSNS-.

9. If they must be placed on the PGOOD pad,

place vias at least 10mm away from the

positive side of the first input decoupling

capacitor and close to the IC.

SW

PGND

VOUT

PGND

VIN

VO-

RFB2

RCS

RBST

CSS2

VOSENSE+

VOSENSE-

CVCC

VIN

Figure 6: Recommended PCB Layout