AD9983ASLASHPCB datasheet(41/44 Pages) AD

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Preliminary Technical Data

AD9983A

Rev. PrA | Page 41 of 44

OUTPUTS (BOTH DATA AND CLOCKS)

Try to minimize the trace length that the digital outputs have to

drive. Longer traces have higher capacitance and require more

instantaneous current to drive, which creates more internal

digital noise. Shorter traces reduce the possibility of reflections.

Adding a series resistor of value 50 Ω to 200 Ω can suppress

reflections, reduce EMI, and reduce the current spikes inside of

the AD9983A. If series resistors are used, place them as close to

the AD9983A pins as possible, but try not to add vias or extra

length to the output trace to get the resistors closer.

If possible, limit the capacitance that each digital output drives

to less than 10 pF. This is easily accomplished by keeping traces

short and by connecting the outputs to only one device.

Loading the outputs with excessive capacitance increases the

current transients inside of the AD9983A and creates more

digital noise on its power supplies.

DIGITAL INPUTS

Digital inputs on the AD9983A (HSYNC0, HSYNC1, VSYNC0,

VSYNC1, SOGIN0, SOGIN1, SDA, SCL, and CLAMP) are

designed to work with 3.3 V signals, but are tolerant of 5.0 V

signals. Therefore, no extra components need to be added if

using 5.0 V logic.

Any noise that gets onto the Hsync input trace adds jitter to the

system. Therefore, minimize the trace length and do not run

any digital or other high frequency traces near it.

Reference Bypass

The AD9983A has three reference voltages that must be

bypassed for proper operation of the input PGA. REFLO and

REFHI are connected to each other through a 10 μF capacitor.

These references are used by the input PGA circuitry to assure

the greatest stability. Place them as close to the AD9983A pin as

possible. Make the ground connection as short as possible.

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