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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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RT7207 датащи(PDF) 11 Page - Richtek Technology Corporation |
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RT7207 датащи(HTML) 11 Page - Richtek Technology Corporation |
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11 / 25 page  RT7207 11 DS7207-00 January 2017 www.richtek.com © Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Parameter Symbol Test Conditions Min Typ Max Unit SR Control Section SR MOSFET VDS Scaling Factor KVDS_SR RVDS2 / (RVDS1 + RVDS2) (For RT7207) (Note 5) -- 1/42 -- -- RVDS2 / (RVDS1 + RVDS2) (For RT7207L) (Note 5) -- 1/26 -- V_TR Internal Resistance RVDS2 4.56 4.8 5.04 k Maximum Ratio of VG On-Time KSRON_MAX If tSR_ON[n] > tSR_ON[n-1] x KSRON_MAX, tSR_ON[n] will limited to tSR_ON[n-1] x KSRON_MAX and stop automatic tracking counter (Note 5) -- 1.06 -- -- OTP-Programmable V_TR Pulse Width Expansion/Shrink Limit tPWLMT_VTR If tV_TR[n] > tV_TR[n-1] + tPWLMT_VTR or tV_TR[n] < tV_TR[n-1] - tPWLMT_VTR, reset automatic tracking counter (Note 5) 00 -- 0.3 -- s 01 -- 0.5 -- 10 -- 0.7 -- 11 -- 0.9 -- Register-Programmable Minimum Period tPERIOD_MIN Interval limit from V_TR rising edge to VG falling edge The clock period is based on fOSC_MCU and can be set by the 12-bit register (Note 5) -- 190 -- s PLL Function Section Register-Programmable PLL Dead Time tDEAD_PLL If VG falling edge to VTH_VTR_DT interval < tDEAD_PLL, VG will skipped two cycles and reset automatic tracking counter (Note 5) 00 -- 2300 -- ns 01 -- 1800 -- 10 -- 1300 -- 11 -- 800 -- Fault PLL Ratio KFAULT_PLL If tPW M[n] > KFAULT_PLL x tPW M[n-1], reset automatic tracking counter (Note 5) -- 1.25 -- -- Automatic Tracking Section Register-Programmable Auto-Tracking Dead Time tDEAD_TRACK VG falling edge to VTH_VTR_DT interval (Note 5) 00 -- 2500 -- ns 01 -- 2000 -- 10 -- 1500 -- 11 -- 1000 -- Maximum Step Time for Tracking Up/Down With respect to VREF_CV (Note 5) -- 1 -- % |
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