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TMS320VC549 датащи(PDF) 14 Page - Texas Instruments |
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TMS320VC549 датащи(HTML) 14 Page - Texas Instruments |
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14 / 63 page ![]() TMS320VC549 FIXEDPOINT DIGITAL SIGNAL PROCESSOR SPRS078G − SEPTEMBER 1998 − REVISED OCTOBER 2004 14 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 PARAMETER MEASUREMENT INFORMATION timing parameter symbology Timing parameter symbols used are created in accordance with JEDEC Standard 100-A. To shorten the symbols, some of the pin names and other related terminology have been abbreviated as follows: Lowercase subscripts and their meanings: Letters and symbols and their meanings: a access time H High c cycle time (period) L Low d delay time V Valid dis disable time Z High impedance en enable time f fall time h hold time r rise time su setup time t transition time v valid time w pulse duration (width) X Unknown, changing, or don’t care level signal transition reference points All timing references are made at a voltage of 1.5 volts, except rise and fall times which are referenced at the 10% and 90% points of the specified low and high logic levels, respectively. Tester Pin Electronics VLoad IOL CT IOH Output Under Test 50 Ω Where: IOL = 1.5 mA (all outputs) IOH = 300 µA (all outputs) VLoad = 1.5 V CT = 40 pF typical load circuit capacitance. Figure 1. 3.3-V Test Load Circuit |
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