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TMS320VC549 датащи(PDF) 52 Page - Texas Instruments |
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TMS320VC549 датащи(HTML) 52 Page - Texas Instruments |
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52 / 63 page ![]() TMS320VC549 FIXEDPOINT DIGITAL SIGNAL PROCESSOR SPRS078G − SEPTEMBER 1998 − REVISED OCTOBER 2004 52 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 serial-port transmit timing in TDM mode (continued) timing requirements over recommended ranges of supply voltage and operating free-air temperature [H = 0.5tc(CO)] (see Figure 28) 549−80 549-100 549-120 UNIT MIN MAX tc(SCK) Cycle time, serial-port clock 16H† ‡ ns tf(SCK) Fall time, serial-port clock 6 ns tr(SCK) Rise time, serial-port clock 6 ns tw(SCK) Pulse duration, serial-port clock low/high 8H† ns † When SCK is generated internally, this value is typical. ‡ The serial-port design is fully static and, therefore, can operate with tc(SCK) approaching 1. It is characterized approaching an input frequency of 0 Hz but tested as a much higher frequency to minimize test time. A7 B2 B8 B7 A3 B12 A2 A0 A1 B0 B1 B13 B14 B0 tw(SCK) tw(SCK) th(TCH-TDV) td(TCH-TFV) TFRM TADD TDAT TCLK B15 tc(SCK) td(TC-TDV) th(TCH-TDV) td(TCH-TFV) td(TC-TDV) tr(SCK) tf(SCK) Figure 28. Serial-Port Transmit Timing in TDM Mode |
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