TPIC5423L

4-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL

POWER DMOS ARRAY

SLIS045 – NOVEMBER 1994

2–10

POST OFFICE BOX 655303

THERMAL INFORMATION

tw – Pulse Duration – s

JUNCTION-TO-BOARD THERMAL RESISTANCE

vs

PULSE DURATION

† Device mounted on 24 in2, 4-layer FR4 printed-circuit board with no heatsink.

NOTE A: Z

θB(t) = r(t) RθJB

tw = pulse duration

tc = cycle time

d = duty cycle = tw /tc

0.1

100

1

0.0001

0.001

0.01

0.1

1

100

DC Conditions

d = 0.5

d = 0.2

d = 0.1

d = 0.02

d = 0.05

d = 0.01

Single Pulse

tw

tc

ID

0

10

10

Figure 17