6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) (2)

MIN

MAX

UNIT

VIN

Continuous input voltage range (for legacy chip)

–0.3

16

V

Continuous input voltage range (for new chip)

–0.3

18

VOUT

Output voltage range (for legacy chip)

–0.3

9

Output voltage range (for new chip)

–0.3

VIN + 0.3 or 9 (whichever

is smaller)

VBYPASS

BYPASS pin voltage range (for new chip)

–0.3

3

VON/OFF

ON/OFF pin voltage range (for legacy chip)

–0.3

16

ON/OFF pin voltage range (for new chip)

–0.3

18

Current

Maximum output

Internally limited

A

Temperature

Operating junction, TJ

–55

150

°C

Storage, Tstg

–65

150

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress

ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

(2)

All voltages with respect to GND.

6.2 ESD Ratings

VALUE

(Legacy

Chip)

VALUE

(New

Chip)

UNIT

V(ESD)

Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

±3000

V

Charged device model (CDM), per JEDEC specification JESD22-C101(2)

±500

±1000

(1)

JEDEC document JEP155 states that 2-kV HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 500-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN

NOM

MAX

UNIT

VIN

Supply input voltage (for legacy chip)

2.2

16

V

Supply input voltage (for new chip)

2.5

16

VOUT

Output voltage (for legacy chip)

1.2

10.0

Output voltage (for new chip)

1.2

5.0

VBYPASS

Bypass voltage

1.2

VON/OFF

Enable voltage (for legacy chip)

0

VIN

Enable voltage (for new chip)

0

16

IOUT

Output current

0

150

mA

CIN (1)

Input capacitor

1

μF

COUT

Output capacitor (for legacy chip)

2.2

4.7

μF

Output capacitance (for new chip) (1)

1

2.2

200

TJ

Operating junction temperature

–40

125

°C

(1)

All capacitor values are assumed to derate to 50% of the nominal capacitor value. Maintain an effective output capacitance of 1 μF

minimum for stability.

LP2985, LP2985A

SLVS522R – JULY 2004 – REVISED JULY 2023

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