MIC4606 datasheet(22/40 Pages) MICROCHIP

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MIC4606

DS20005604D-page 22

 2017-2019 Microchip Technology Inc.

FIGURE 7-3:

Adaptive Dead-Time Logic

Diagram.

The MIC4606 uses a combination of active sensing

and passive delay to ensure that both MOSFETs are

not on at the same time. Figure 7-3 illustrates how the

adaptive dead-time circuitry works.

For the MIC4606-2, a high level on the xPWM pin

causes /HI to go high and /LI to go low. This causes the

xLO pin to go low. The MIC4606 monitors the xLO pin

voltage and prevents the xHO pin from turning on until

the voltage on the xLO pin reaches the VLOOFF thresh-

old. After a short delay, the MIC4606 drives the xHO pin

high. Monitoring the xLO voltage eliminates any exces-

sive delay due to the MOSFET drivers turn-off time and

the short delay accounts for the MOSFET turn-off

delay, as well as letting the xLO pin voltage settle out.

An external resistor between the xLO output and the

MOSFET may affect the performance of the xLO pin

monitoring circuit and is not recommended.

A low on the xPWM pin causes /HI to go low and /LI to

go high. This causes the xHO pin to go low after a short

delay (tHOOFF). Before the xLO pin can go high, the

voltage on the switching node (xHS pin) must have

dropped to 2.2V. Monitoring the switch voltage instead

of the xHO pin voltage eliminates timing variations and

excessive delays due to the high-side MOSFET

turn-off. The xLO driver turns on after a short delay

(tLOON). Once the xLO driver is turned on, it is latched

on until the xPWM signal goes high. This prevents any

ringing or oscillations on the switch node or xHS pin

from turning off the xLO driver. If the xPWM pin goes

low and the voltage on the xHS pin does not cross the

VSWTH threshold, the xLO pin will be forced high after

a short delay (tSWTO), insuring proper operation.

The internal logic circuits also insure a “first on” priority

at the inputs. If the xHO output is high, the xLI pin is

inhibited. A high signal or noise glitch on the xLI pin has

no effect on the xHO or xLO outputs until the xHI pin

goes low. Similarly, the xLO being high holds xHO low

until xLI and xLO are low.

Fast propagation delay between the input and output

drive waveform is desirable. It improves overcurrent

protection by decreasing the response time between

the control signal and the MOSFET gate drive. Minimiz-

ing propagation delay also minimizes phase-shift errors

in power supplies with wide bandwidth control loops.

Care must be taken to ensure that the input signal

pulse width is greater than the minimum specified pulse

width. An input signal that is less than the minimum

pulse width may result in no output pulse or an output

pulse whose width is significantly less than the input.

The maximum duty cycle (ratio of high-side on-time to

switching period) is determined by the time required for

the CB capacitor to charge during the off-time. Adequate

time must be allowed for the CB capacitor to charge up

before the high-side driver is turned back on.

Although the adaptive dead-time circuit in the MIC4606

prevents the driver from turning both MOSFETs on at the

same time, other factors outside of the anti-shoot-through

circuit’s control can cause shoot-through. Other factors

include ringing on the gate drive node and capacitive

coupling of the switching node voltage on the gate of the

low-side MOSFET.

The scope photo in Figure 7-4 shows the dead time

(< 20 ns) between the high and low-side MOSFET tran-

sitions as the low-side driver switches off, while the

high-side driver transitions from off to on.

FIGURE 7-4:

Adaptive Dead-Time LO

(Low) to HO (High).

Table 7-1 contains truth tables for the MIC4606-1

(Independent TTL inputs) and Table 7-2 is for the

MIC4606-2 (PWM inputs) that details the “first on” pri-

ority as well as the failsafe delay (tSWTO).

1.9V

35 ns

DELAY

250 ns

DELAY

2.2V

SECTION

FF RESET

SECTION

AND INPUT

TABLE 7-1:

MIC4606-1 TRUTH TABLE

xLI

xHI

xLO

xHO

Comments

Both outputs off.

xHO will not go high until

xLO falls below 1.9V.

xLO will be delayed an

extra 250 ns if xHS never

falls below 2.2V.

First on stays on until

input of same goes low.

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