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UPC4072 датащи(PDF) 3 Page - Renesas Technology Corp |
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UPC4072 датащи(HTML) 3 Page - Renesas Technology Corp |
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3 / 11 page ![]() The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. BIPOLAR ANALOG INTEGRATED CIRCUIT μ PC4072 J-FET INPUT LOW-NOISE DUAL OPERATIONAL AMPLIFIER DATA SHEET Document No. G15205EJ6V0DS00 (6th edition) Date Published December 2007 NS Printed in Japan 1987 The mark <R> shows major revised points. The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field. DESCRIPTION The μ PC4072 is a J-FET input operational amplifier. This product is designed as low noise version of the μ PC4082. The features of the μ PC4072 are more improved input equivalent noise voltage, input offset voltage and input bias current than those of μ PC4082. By these features, the μ PC4072 is excellent choice for wide variety of applications including audio preamplifier and active filter. FEATURES • Low noise: en = 17 nV/ Hz (TYP.) • Very low input bias and offset currents • Output short circuit protection • High input impedance...J-FET Input stage • Internal frequency compensation • High slew rate...13 V/ μs (TYP.) ORDERING INFORMATION Part Number Package μ PC4072C 8-pin plastic DIP (7.62 mm (300)) μ PC4072G2 8-pin plastic SOP (5.72 mm (225)) EQUIVALENT CIRCUIT (1/2 Circuit) PIN CONFIGURATION (Top View) μ PC4072C, 4072G2 1 1 2 3 4 8 7 6 5 V + OUT2 II2 IN2 + – 2 OUT1 II1 IN1 V – + – R1 R8 R9 R6 D1 R7 R10 R11 D2 Q15 R4 R2 R5 R3 II IN Q1 Q2 Q8 Q16 Q9 Q10 Q12 Q13 Q5 Q14 Q3 Q4 Q11 Q6 Q7 C1 OUT V – V + <R> <R> |
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