74ALVT162821

20-bit bus interface D-type flip-flop; positive-edge trigger with

30 Ω termination resistors; 3-state

Rev. 5 — 19 October 2020

Product data sheet

1. General description

The 74ALVT162821 is a 20-bit positive-edge triggered D-type flip-flop with 30 Ω termination

resistors and 3-state outputs

The device can be used as two 10-bit flip-flops or one 20-bit flip-flop. The device features

two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 10-bits.

The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time

requirements on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOE causes the outputs to

assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the

flip-flops. Bus hold data inputs eliminate the need for external pull-up resistors to define unused

inputs

2. Features and benefits

• Wide supply voltage range from 2.3 V to 3.6 V

• Overvoltage tolerant inputs to 5.5 V

• BiCMOS high speed and output drive

• Outputs include series resistance of 30 Ω making external termination resistors unnecessary

• No bus current loading when output is tied to 5 V bus

• Direct interface with TTL levels

• IOFF circuitry provides partial Power-down mode operation

• 20-bit positive-edge triggered register

• 5 V I/O compatible

• Multiple VCC and GND pins minimize switching noise

• Bus hold on data inputs

• Live insertion and extraction permitted

• Power-up reset

• Power-up 3-state

• Output capability: +12 mA and -12 mA

• Latch-up protection:

• JESD17: exceeds 500 mA

• ESD protection:

• MIL STD 883, method 3015: exceeds 2000 V

• MM: exceeds 200 V

• Specified from -40 °C to 85 °C

3. Ordering information

Table 1. Ordering information

Package

Type number

Temperature range

Name

Description

Version

74ALVT162821DGG -40 °C to +85 °C

TSSOP56 plastic thin shrink small outline package; 56 leads;

body width 6.1 mm

SOT364-1