SC2450 datasheet(15/20 Pages) SEMTECH

15 / 20 page

 2001 Semtech Corp.

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POWER MANAGEMENT

SC2450

Bias Generation

A 6-7 Volt supply voltage is required to power up the SC2450.

This voltage could be provided by an external power supply or

derived from VIN through an external pass transistor. REGDRV

is the control signal to the base of the pass transistor that will

regulate VCC. The voltage at the VCC pin is compared to the

internal voltage reference, and the REGDRV pin can sink up to

5 mA current to regulate the voltage at the VCC pin.

Enable

If the ENABLE pin is connected to logic high, the SC2450 is

enabled, while connecting it to ground will put the device into

disabled mode. The ENABLE pin can also be configured as

input UVLO through input voltage divider resistors. The control-

ler will be enabled when the ENABLE pin voltage reaches 2.05

V, and will be disabled with 400 mV hysteresis.

Under Voltage Lockout

Under Voltage lockout (UVLO) circuitry senses VCC through a

voltage divider. If this signal falls below 5.8 V, with a typical

hysteresis of 400 mV, the BG pin is pulled low by an internal

transistor causing the lower MOSFET gate to be on and the

upper MOSFET gate off for both phases.

Over Voltage Protection

The SC2450 provides OVP protection for each output individu-

ally. Once the converter output voltage exceeds 120% nominal

output voltage, the lower MOSFET gates are latched on and

the upper MOSFET gates are latched off. The latch is then

reset once the OVP condition is removed.

Soft Start

An external capacitor at the BG pin is used to set up the Soft

Start duration. The capacitor value, in conjunction with the

internal 3K resistor at the BG pin, control the duration to bring

up the bandgap to its final level. As the BG capacitor is being

charged through the internal resistor, the PWM pulse opens

accordingly until the bandgap is charged completely. This

controlled start up of the PWM prevents output voltage over-

shoot, unnecessary component stress, and noise generation

during start up.

Theory of Operation (Cont.)

Over Current Protection

The SC2450 current limit provides protection during an over

current condition. A sense resistor or PCB trace can be used

to sense the input supply current.

The over current protection trip point is determined by the volt-

age drop across the sense resistor. Once this voltage drop

exceeds 115 mV, OCP protection circuit will be triggered. Due

to component and layout parasitics, filtering might be neces-

sary across the OC+ and OC- pins. It is recommended to use

20 Ohm resistor and 10 nF capacitor for filtering. The OCP

accuracy may be affected by non-ideal PCB layout and

MOSFET variations. To accommodate these variations, the OCP

threshold can be externally adjusted by a voltage divider across

the sense resistor to attenuate the voltage drop across the

sense resistor, so that increase the OCP threshold accord-

ingly. See application circuits.

Once an over current condition occurs, the lower MOSFET

gates are latched on and the upper MOSFET gates are latched

off. The latch is then reset at the beginning of the next clock

cycle. The cycle is repeated indefinitely until the over current

condition removed.

Thermal Shutdown

In addition to current limit, the SC2450 monitors over tempera-

ture condition. The over temperature detect will shut down the

part if the SC2450 die temperature exceeds 150°C, and will

auto reset once the die temperature is dropped down.

Gate Drive

The SC2450 integrates high current gate drivers for fast switch-

ing of large MOSFETs. The high-side gates can be switched

with peak currents of 1 Amp, while the larger low-side gates

can be switched with peak currents of 2 Amps. A cross con-

duction prevention circuitry ensures a non-overlapping opera-

tion between the Upper and Lower MOSFETs. This prevents

false current limit tripping and provides high efficiency.

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