Nexperia

74LVC2G126

Dual bus buffer/line driver; 3-state

11.1. Waveforms and test circuit

mna230

tPHL

tPLH

VM

VM

nA input

nY output

GND

VI

VOH

VOL

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 5. The data input (nA) to output (nY) propagation delays

mna949

tPLZ

tPHZ

outputs

disabled

outputs

enabled

VY

VX

outputs

enabled

output

LOW-to-OFF

OFF-to-LOW

output

HIGH-to-OFF

OFF-to-HIGH

nOE input

VOL

VOH

VCC

VI

VM

GND

GND

tPZL

tPZH

VM

VM

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 6. 3-state enable and disable times

Table 9. Measurement points

Supply voltage

Input

Output

VCC

VM

VM

VX

VY

1.65 V to 1.95 V

0.5 × VCC

0.5 × VCC

VOL + 0.15 V

VOH - 0.15 V

2.3 V to 2.7 V

0.5 × VCC

0.5 × VCC

VOL + 0.15 V

VOH - 0.15 V

2.7 V

1.5 V

1.5 V

VOL + 0.3 V

VOH - 0.3 V

3.0 V to 3.6 V

1.5 V

1.5 V

VOL + 0.3 V

VOH - 0.3 V

4.5 V to 5.5 V

0.5 × VCC

0.5 × VCC

VOL + 0.3 V

VOH - 0.3 V

74LVC2G126

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Product data sheet

Rev. 15 — 28 April 2020

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