Nexperia

74LVC2G126

Dual bus buffer/line driver; 3-state

6. Pinning information

6.1. Pinning

74LVC2G126

1OE

VCC

1A

2OE

2Y

1Y

GND

2A

001aab740

1

2

3

4

6

5

8

7

Fig. 3. Pin configuration SOT505-2 (TSSOP8) and

SOT765-1 (VSSOP8)

74LVC2G126

1Y

2OE

VCC

2A

2Y

1A

1OE

GND

001aab741

3

6

2

7

1

8

4

5

Transparent top view

Fig. 4. Pin configuration SOT833-1, SOT1089, SOT1116

and SOT1203 (XSON8)

6.2. Pin description

Table 3. Pin description

Symbol

Pin

Description

1OE, 2OE

1, 7

output enable input (active HIGH)

1A, 2A

2, 5

data input

1Y, 2Y

6, 3

data output

GND

4

ground (0 V)

VCC

8

supply voltage

7. Functional description

Table 4. Function table

H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.

Input

Output

nOE

nA

nY

H

L

L

H

H

H

L

X

Z

74LVC2G126

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Product data sheet

Rev. 15 — 28 April 2020

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