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CDB5014 датащи(PDF) 2 Page - Cirrus Logic

номер детали CDB5014
подробное описание детали  Evaluation Board
PDF  7 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CDB5014 датащи(HTML) 2 Page - Cirrus Logic

  CDB5014 Datasheet HTML 1Page - Cirrus Logic CDB5014 Datasheet HTML 2Page - Cirrus Logic CDB5014 Datasheet HTML 3Page - Cirrus Logic CDB5014 Datasheet HTML 4Page - Cirrus Logic CDB5014 Datasheet HTML 5Page - Cirrus Logic CDB5014 Datasheet HTML 6Page - Cirrus Logic CDB5014 Datasheet HTML 7Page - Cirrus Logic  
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Analog Input
The analog input to the A/D converter is supplied
through the BNC coaxial connector labeled AIN.
Analog input polarity is controlled by the first
position switch on the DIP-switch, SW-1. If it is
on, the input is unipolar ranging from GND to
VREF. If the switch is off, the input range is bi-
polar with the magnitude of the reference voltage
defining both zero- and full-scale (
±VREF).
The A/D converter’s internal analog input buffer
requires a source impedance of less than 400
Ω
at 1MHz for stability. Acquisition and throughput
are specified assuming a dc source impedance of
less than 200
Ω. Infinitely large dc source imped-
ances can be accommodated by adding capaci-
tance (typically 1000pF) from the analog input to
ground. However, high dc source resistances de-
grade acquisition time and consequently through-
put.
CS
EOC
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A0
2
3
4
5
6
7
8
9
12
13
14
15
16
17
18
19
38
21
22
23
VD-
VD+
+
36
11
10
C1
C2
C3
C4
VA-
VA+
25
27
30
C5
C6
C10
C11
+
SCLK
SDATA
AIN
CLKIN
39
40
26
20
32
VREF
28
RESET
31 TST
29 REFBUF
R10
C7
R8
R9
SW2
VD+
U1
Reset
VD+
R23 (optional)
VA-
D0
C12
SW1-4
+
+
37 EOT
HOLD
1
R3
+5V
-5V
VD+
VD-
R1
R2
VA+
VA-
RD
R7
R5
VD+
R4
24
34
35
BP/UP
CAL
INTLV
SW1-1
SW1-2
SW1-3
33 BW
R12
R13
R11
R6
CS5012A
CS5014
CS5016
CS5012
Figure 1. CDB5012, CDB5012A, CDB5014, CDB5016 Schematic
(Reference Circuitry Appears in Figure 3)
CDB5012, CDB5012A, CDB5014, CDB5016
DS14DB11
2



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