LTM4643 datasheet(7/24 Pages) AD

7 / 24 page

PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE

LAYOUT CAREFULLY.

LTM4710-1

Rev. 0

For more information www.analog.com

PIN FUNCTIONS

GND (Bank 1, Banks 10 – 12, Pin A9): Power Ground

Pins for All Input and Output Returns.

VIN1, VIN2, VIN3, VIN4 (Banks 2 – 5, Pin D9): Power Input

Pins. Apply input voltage between these pins and GND

pins. Recommend placing input decoupling capacitance

directly between VIN pins and GND pins.

VOUT1, VOUT2, VOUT3, VOUT4 (Banks 6 – 9): Power Output

Pins of Each Switching Mode Regulator. Apply output load

between these pins and GND pins. Recommend placing

output decoupling capacitance directly between these

pins and GND pins.

RUN1, RUN2, RUN3, RUN4 (Pins A5, F5, K5, R5):

Enables chip operation by connecting RUN above 0.4V.

Connecting it to GND shuts down the device.

FB1, FB2, FB3, FB4 (Pins A6, F6, K6, R6): The nega-

tive input of the error amplifier for the switching mode

regulator channel. The LTM4710-1 regulates the voltage

between FB and AGND to 500mV. For FB1, this pin is

internally connected to VOSNS1 with a 10k 0.5% precision

resistor. Different output voltages can be programmed

with an additional resistor between VOSNS1 and AGND. For

FB2, FB3 and FB4, a resistor divider connecting to VOUT

sets the output voltage. In PolyPhase® operation, tie the

FB pins to VIN to disable the internal error amplifier. See

the Applications Information section for details.

SSTT1, SSTT2, SSTT3, SSTT4 (Pins B5, G5, L5, T5):

Soft-Start, Tracking and Temperature Monitor Pins. An

internal 10μA current into an external capacitor on the

soft-start pin programs the output voltage ramp rate

during start-up. When SSTT is below 0.5V, the VFB pin

voltage will track the SSTT pin voltage. When SSTT is

above 0.5V, the tracking function is disabled, the internal

reference resumes control of the error amplifier and the

SSTT pin servos to a voltage representative of a junction

temperature. During shutdown and fault conditions, the

SSTT pin is pulled to ground.

COMP1b, COMP2b, COMP3b, COMP4b (Pins B6, G6,

L6, T6): Internal Compensation Network. These pins are

to be connected to their respective COMPa pins. When

utilizing specific external compensation, float these pins.

PG1, PG2, PG3, PG4 (Pins C5, H5, M5, U5): Output

power good with open-drain logic of the switching mode

regulator channel. PG is pulled to ground when the voltage

on the FB pin is not within –2% and +10% of the internal

0.5V reference.

COMP1a, COMP2a, COMP3a, COMP4a (Pins C6, H6, M6,

U6): Current control threshold and error amplifier com-

pensation point of the switching mode regulator channel.

MODE1, MODE2, MODE3, MODE4 (Pins D5, J5, N5,

V5): MODE pin facilitates multiphase operation and syn-

chronization to an external clock. Depending on the mode

of operation, the MODE either accepts a clock pulse or

outputs a clock pulse at its operating frequency. See the

Applications Information section for details.

RT1, RT2, RT3, RT4 (Pins D6, J6, N6, V6): The fre-

quency pin sets the oscillator frequency with an exter-

nal resistor to AGND or sets the phasing for multiphase

operation. See the Applications Information of section for

frequency adjustment.

VOSNS1 (Pin D7): Output Voltage Sense Pin of Channel 1.

Internally, this pin is connected to the FB1 pin with a 10k,

0.5% precision resistor. It is very important to connect

this pin to the VOUT1 since this is the feedback path and

cannot be left open. See the Applications Information

section for details.

AGND1, AGND2, AGND3, AGND4 (Pins D8, H7, L7, U7):

The AGND pin is the output voltage remote ground sense.

Connect the AGND pin directly to the negative terminal

of the output capacitor at the load and to the feedback

divider resistor.

SW1, SW2, SW3, SW4 (Pins G2, K2, N2, T2): Switching

node waveform monitoring.

NC (Pins A7, A8, B7, B8, B9, C7, C8, C9): No Connection.

Leave these pins open.

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